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  Recent Ph.D. Dissertations

  Invited & Keynote

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    Last updated on December 19, 2020.


Recent Ph.D. Dissertations
  1. Jung-Soo Ko, "Top Gate Dielectric Engineering for Two-Dimensional Transition Metal Dichalcogenides" 2024
  2. Marc Jaikissoon, "CMOS-Compatible Strain Engineering and Device Scaling of Monolayer Molybdenum Disulfide Transistors" 2023
  3. Aravindh Kumar,"Improving Contacts and Doping to Two-Dimensional Transition Metal Dichalcogenides". 2022
  4. Stephanie Tietz, "TAdvancing Photonic Communication and Sensing Through Novel 3D Silicon Photonic Devices". 2021
  5. Koosha Nassiri Nazif, "Transition Metal Dichalcogenides for Next-Generation Photovoltaics." 2021
  6. Pranav Ramesh, "Approaching the Limits of Low Resistance Contacts to N-Type Germanium." 2021
  7. Junkyo Suh, "Silicon-Germanium/Germanium Nanowire Platform for Nanoelectronics and Nanophotonics." 2020
  8. Shashank Gupta, "Advancing Silicon Photonics Through Germanium Based Devices and 3D Integration". 2018
  9. Raisul Islam, "Metal-Oxide Carrier-Selective Contacts for On-Chip Embedded Photovoltaics". 2018
  10. Archana Kumar, "High-Performance Antimonide P-MOSFETs and Their Hetero-Integration on Silicon ." 2018
  11. Gautam Shine, "Electron and Spin Tranport in Disordered Nanoscale Contacts". 2017
  12. Ju Hyung Nam, "Monolithic Integration of Germanium-on-Insulator Platform on Silicon Substrate And Its Applications to Devices". 2016
  13. Dave Sukhdeo, "Band-Engineered Germanium for CMOS-Compatible Light Emission," 2015
  14. Ashish Pal, III-V Material Integration in 1-Transistor Capacitor-Less DRAMâ 2015
  15. Wooshik Jung, "Fluorine Passivation of Defects in Germanium Devicesâ 2014
  16. Donguk Nam, "Strained Germanium Technology for On-chip Optical Interconnects," 2014
  17. Ze Yuan, "Antimonide-Based III-V CMOS Technology," 2013
  18. Suyog Gupta, "Germanium-Tin (GeSn) Technology," 2013
  19. J. Jason Lin, "Low Resistance Contacts to N-type Germanium," 2013
  20. Crystal Kenney, "Exploiting non-linear arrhenius dependence of diode IV curves to determine Schottky barrier band diagrams," 2012
  21. Yeul Na, "Novel Phototransistors For Optical Interconnect," 2012
  22. Arunanshu Roy, "Tunneling Contacts for Novel Semiconductor Devices," 2012
  23. Aneesh Nainani, "High Performance III-V PMOSFET," 2011
  24. Kyung-Hoae Koo, "Comparison Study of Future On-Chip Interconnects for High Performance VLSI Applications," 2011
  25. M. Gunhan Ertosun, "Novel Single Transistor DRAM Technologies," 2010
  26. Sarves Verma, "Tunnel Barrier Engineering for Flash Memory Technology," 2010
  27. Duygu Kuzum, "Interface-Engineered Ge MOSFETs for Future High Performance CMOS Applications," 2009
  28. Donghyun Kim, "Theoretical Performance Evaluations of NMOS Double Gate FETs with High Mobility Materials: Strained III-V, Ge and Si," 2009
  29. Hyun-Yong Yu, "Selective Heteroepitaxial Growth of Ge for Monolithic Integration 0f MOSFETs and Optical Devices," 2009
  30. Jin-Hong Park, "Physics And Technology Of Low Temperature Germanium Mosfets For Monolithic Three Dimentional Integrated Circuits," 2009
  31. Ali Kemal Okyay, Si-Ge Photodetection Technologies for Integrated Optoelectronics , 2007
  32. Hoon Cho, Low Power, Highly Scalable, Vertical Flash Memory Cell and MOSFET , 2007
  33. Abhijit Pethe, Ge-Based Transistors for High-Performance Logic Applications , 2007
  34. Hoyeol Cho, Performance Comparison Between Copper, Carbon Nanotube, and Optics for Off-Chip and On-Chip Interconnects , 2007
  35. Tejas Krishnamohan, Physics and Technology of High Mobility, Strained Germanium Channel, Heterostructure MOSFETs , 2006
  36. Ammar Nayfeh, Heteroepitaxial Growth of Relaxed Germanium on Silicon , 2006
  37. Hyoungsub Kim, "Nano-scale zirconia and hafnia dielectrics grown by atomic layer deposition: crystallinity, interface structures and electrical properties," 2004
  38. Chi On Chui, Advanced Germanium Complementary-Metal-Oxide-Semiconductor Technologies , 2004
  39. Ting-Yen Chiang, Electrothermal Analysis of VLSI Interconnects , 2004
  40. Nabeel Ibrahim, Dopant Diffusion and Deactivation in Silicon in the Presence of Metal Silicides , 2004
  41. Rohit Shenoy, Technology and Scaling of Ultrathin Body Double-Gate FETs , 2004
  42. Shukri Souri 3D ICs Interconnect Performance Modeling and Analysis , 2003
  43. Marci Liao, Environmentally Benign Semiconductor Processing for Dielectric Etch , 2003
  44. Amol Joshi, High Performance CMOS With Metal Induced Lateral Crystallization of Amorphous Silicon , 2002
    45.
  45. Pawan Kapur, Scaling Induced Performance Challenges/Limitations of On-Chip Metal Interconnects and Comparisons with Optical Interconnects, 2002

    Invited& Keynote
    1. Krishna Saraswat, "Interconnect Past, Present and Future," IEEE EDS workshop on Evolution of Transistor and Emerging Research Devices, August 21, 2023, (Invited).
    2. Krishna Saraswat, "Real Limits to Nanoelectronics: Contacts and Interconnects," XXI Int. Workshop on the Physics of Semiconductor Devices (IWPSD 2021), 14-17 Dec. 2021, (plenary).
    3. Krishna Saraswat, "Emerging Interconnect Technologies for Nanoelectronics," IEEE UEMCON 2021, New York, 1-4 Dec. 2021, (keynote).
    4. Krishna Saraswat, "Real Limits to Nanoelectronics: Contacts and Interconnects" XXI Int. Workshop on the Physics of Semiconductor Devices (IWPSD 2021), 14-17 Dec. 2021, (plenary).
    5. Krishna Saraswat, "Emerging Interconnect Technologies for Nanoelectronics," IEEE Int. IOT Electronics and Mechatronics Conf., April, 2021, Toronto, Canada. (Keynote).
    6. Krishna Saraswat, ``Silicon compatible optical interconnect and monolithic 3-D integration,`` IEEE International Electron Devices Meeting, December 2020. (Invited).
    7. Koosha Nassiri Nazif, Aravindh Kumar, Krishna Saraswat, ``High Voc, thin film WS2 solar cells for energy harvesting applications,`` SPIE Conf. Optics+ Photonics, San Diego, Aug. 11-15, 2019 (Invited).
    8. Krishna Saraswat, ``Emerging Interconnect Technologies for Nanoelectronics,`` 2nd Euroscicon Conf. on Nanobiotechnology and Material Science, August 2019, Melbourne, Australia. (keynote).
    9. Krishna Saraswat, ``Emerging Interconnect Technologies for Nanoelectronics," IEEE VLSI Symp., June 2019, Kyoto. (invited)
    10. R. Islam, H. Li, P.-Y. Chen, W. Wan, H.-Y. Chen, B. Gao, H. Wu, S. Yu, K. C. Saraswat, and H.-S. P. Wong, "Device and materials requirements for neuromorphic computing," Journal of Physics D: Applied Physics, vol. 52, no. 11, (2019) p. 113001. doi: 10.1088/1361-6463/aaf784. (Invited)
    11. Krishna Saraswat, ``Emerging Interconnect Technologies for Nanoelectronics,`` NanoWorld Conf. San Francisco, April 2018. (Keynote)
    12. Krishna Saraswat, `` Real Limits to Nanoelectronics: Interconnects and Contacts,``International Reliability Physics Symposium (IRPS), San Francisco, March 14, 2018. (Invited)
    13. Krishna Saraswat, `` Real Limits to Nanoelectronics: Interconnects and Contacts,`` International Workshop on the Physics of Semiconductor Devices (IWPSD), Delhi, India. Dec. 2017, (Keynote).
    14. Krishna Saraswat, ``Emerging Interconnect Technologies for Ex-scale Computing,`` National Supercomputing Mission Conclave, Bangluru, India, Dec. 2017, (Keynote).
    15. Krishna Saraswat, ``Real Limits to Nanoelectronics: Interconnects and Contacts,`` International Electron Devices & Materials Symposium (IEDMS 2017), Hsinchu, Taiwan, Sept. 2017. (Keynote)
    16. Krishna Saraswat, ``Low Resistance Contacts to Nanoscale FET," 2017 Advanced Metallization Conference, Austin, Texas, Sept. 2017. (invited)
    17. Krishna Saraswat, ``Emerging Interconnect Technologies for Nanoelectronics,`` 11th International ESD Workshop, May 7-11, 2017, Tahoe City, California, (Keynote)
    18. D. Kim, S. Bao, C. S. Tan, J. H. Nam, K. C. Saraswat, and D. Nam, "The Effect of Germanium/Silicon Interface on Germanium Photonics," ECS Trans. SiGe, Ge, and Related Materials: Materials, Processing, and Devices 7, Vol. 75, No. 8, pp. 683-688, October 2016. Also 230th ECS Meeting, Abstract #2037, Honolulu, October 2-7, 2016. (invited)
    19. Krishna C. Saraswat and G. Shine, ``Low Resistance Contacts to Nanoscale Semiconductor Devices,'' ECS Trans. SiGe, Ge, and Related Materials: Materials, Processing, and Devices 7, Vol. 75, No. 8, pp. 513-524, October 2016. Also presented at the 230th ECS Meeting, Abstract #1984, Honolulu, October 2-7, 2016. (Invited).
    20. D. Kim, S. Bao, C. S. Tan, J. H. Nam, K. C. Saraswat, and D. Nam, "The Effect of Germanium/Silicon Interface on Germanium Photonics," ECS Trans. SiGe, Ge, and Related Materials: Materials, Processing, and Devices 7, Vol. 75, No. 8, pp. 683-688, October 2016. Also 230th ECS Meeting, Abstract #2037, Honolulu, October 2-7, 2016. (invited) (Invited).
    21. Krishna C. Saraswat, ``Emerging Interconnect Technologies," IEEE Int. Electron Dev. Meet. (IEDM), Dec. 6, 2015, Invited Short Course..
    22. Krishna C. Saraswat, ``What Makes Silicon Valley and Stanford University Tick?," 19th International Conference on Engineering Education, International Network for Engineering Education and Research, Zagreb, Croatia, July 21, 2015. Plenary Talk .
    23. Krishna C. Saraswat, ``How far can we push Si CMOS and what are the future alternatives," 7th Bangalore INDIA NANO Conf., Bangalore, India, December 6, 2014. Plenary Talk .
    24. Krishna C. Saraswat, ``Quantum Well Heterostructures for Electronics and Photonics,"2nd IEEE International Conference on Emerging Electronics (ICEE), Bangalore, India, December 4, 2014. Plenary Talk .
    25. D. Nam, D. S. Sukhdeo, B. R. Dutt, and K. C. Saraswat, ``Light emission from highly-strained germanium for on-chip optical interconnects," ECS Transactions, Vol. 64, No. 6, pp. 371-381, 2014. Also presented at 226th Meeting of The Electrochem. Soc., Abs. No. P7-1796, Cancun, October 2014. (Invited).
    26. Krishna C. Saraswat, ``How far can we push Si CMOS and what are the alternatives for future ULSI," IEEE Device Research Conf., Santa Barbara, June 2014. Plenary Talk .
    27. Suyog Gupta, X. Gong, R. Zhang, Y.-C. Yeo, S. Takagi and K. C. Saraswat, "New Materials for Post-Si Computing: Ge and GeSn Devices, " MRS Bulletin, Vol. 39, August 2014, pp. 678 "ì 686. (Invited).
    28. D. S. Sukhdeo, D. Nam, J.-H. Kang, M. L. Brongersma and K. C. Saraswat, "√∫Direct Bandgap Germanium-on-Silicon Inferred from 5.7% <100> Uniaxial Tensile Strain,"√π Photonics Research, Vol. 2, No. 3, June 2014 pp. A8-A13, (Invited).
    29. Krishna Saraswat, "Schottky Barrier Height Engineering for Low Resistance Contacts to Semiconductor Devices"√π, 42nd Annual Northern California Electronic Material Symposium, Santa Clara, May 9, 2014. Invited .
    30. Krishna Saraswat, "Schottky Barrier Height Engineering for Low Resistance Contacts to Semiconductor Devices"√π, IEEE Mumbai Chapter, IIT Bombay, India, Dec. 30, 2013. Invited .
    31. Krishna Saraswat, J.-Y. Jason Lin, Aneesh Nainani, Arunanshu Roy, Gautam Shine and Ze Yuan, ``Schottky Barrier Height Engineering for Low Resistance Contacts to Ge and III-V Devices," 44th IEEE Semiconductor Interface Specialists Conference (SISC), Arlington, VA, Dec. 2013. Invited .
    32. Krishna C. Saraswat, ``Performance Limitation of CMOS with Cu/low-k Interconnects and Possible Future Alternatives,"√π International Symposium for Testing and Failure Analysis (ISTFA) 2013, San Jose, CA, Nov. 2013. Plenary.
    33. Krishna C. Saraswat, S. Gupta, A. Nainani, B. Yang, Z. Yuan ``Surface Passivation of III-V Antimonides and Ge Based MOSFET," 60th AVS International Symposium, Paper No. EM-MoA6, Long Beach, CA, 2013. Invited.
    34. Krishna C. Saraswat, ``Stanford Engineering & Research on Materials and Device,'' International Workshop on Nanodevice Technologies 2013, Hiroshima University, Japan, March 5, 2013. Plenary.
    35. Krishna C. Saraswat, ``Performance Limitation of Cu/low-k Interconnects and Possible Future Alternatives,"√π First IEEE International High Speed Interconnects Symposium, Dallas, TX, April 30, 2013. Plenary.
    36. Krishna C. Saraswat, ``Si Compatible Ge Based Devices for Optical Interconnects,'' 2013 Tsukuba Nanotechnology Symposium, Tsukuba, Japan, July 2013. (Invited)
    37. Krishna C. Saraswat, J.-Y. Jason Lin, A. Nainani, A. Roy, B. Yang and Ze Yuan, ``Schottky Barrier Height Engineering for Low Resistance Contacts to Ge and III-V Devices,'' Presented at 222th Meeting of The Electrochem. Soc., Abs. No. 2630, Honolulu, October 2012. Invited.
    38. S. Gupta, R. Chen, B. Vincent, D. Lin, B. Magyari-Kope,M. Caymax, J. Dekoster, J. S. Harris, Y. Nishi, and K. Saraswat, `` GeSn Channel n and p MOSFETs,'' Presented at 222th Meeting of The Electrochem. Soc., Abs. No. 3222, Honolulu, October 2012. Invited.
    39. Aneesh Nainani, Z. Yuan, A. Kumar, B. R. Bennett, B. J. Boos and K. C. Saraswat. "III-Sb MOSFETS : Opportunities and Challenges" ECS Transactions, Volume 45, Number 4, p.91-96, (2012). Invited.
    40. Krishna C. Saraswat, ``Ge Based MOSFETs and Optical devices for Interconnects Integrated on Si,'' Int. Symp. on Adv. Sci. and Tech. of Silicon Materials, Kona, Japan Soc. of Appl. Phys., Nov. 2012. Invited.
    41. Krishna C. Saraswat, ``Germanium/Silicon based Novel Electronic and Optoelectronic Devices for Nanoelectronics," Communications, Microsystems, Optoelectronics, Sensors Emerging Technologies Conf., Whistler, BC, Canada, June 15-17, 2011. Plenary.
    42. Krishna C. Saraswat, ``Performance Limitation of Cu/low-k Interconnects and Possible Future Alternatives: CNT, 3-D and Optics," Advanced Metallization Conference, San Diego, October 2011, Invited.
    43. Krishna C. Saraswat, " Germanium Integration on Silicon for High Performance MOSFETs and Optical Interconnects," MRS spring meeting, April 2010, San Francisco. Invited.
    44. Krishna C. Saraswat, "Performance Limitations of Cu/low-K Interconnects and Possible Future Alternatives," IEEE IITC short course, June 2010, Burlingame. Invited.
    45. Krishna C. Saraswat, "3-D ICs: Motivation, Performance Analysis, Technology and Applications,"17th International Symposium on the Physical & Failure Analysis of Integrated Circuits, Singapore, July 2010. Keynote
    46. K. C. Saraswat, ``Novel Electronic and Optoelectronic Devices in Germanium Integrated on Silicon,'' 218th Electrochem. Soc. Meet., Las Vegas, October 10 - 15, 2010. Invited.
    47. Szu-Lin Cheng, G. Shambat, J. Lu, H.-Yu, K. C. Saraswat, J. Vuckovic and Y. Nishi, ``Characterizations of direct band gap PL and EL from epi-Ge on Si,'' ECS Transactions, Vol. 33, No. 6, pp. 545-554, 2010. Also presented at 218th Electrochem. Soc. Meet., Abs. No. 1862, Las Vegas, October 10 - 15, 2010. Invited.
    48. K. C. Saraswat, "3-D ICs: Motivation, Performance Analysis and Technology,"19th Lithography Workshop, Coeur d`Alene, Idaho, June 2009. Invited .
    49. Krishna C. Saraswat, et al., "Ge MOSFET and Single T DRAM," 6th International Symposium on Advanced Gate Stack Technology, San Francisco, August 23-26, 2009. Keynote address .
    50. Paul C. McIntyre, E. Kim, E. Chagarov, J. Cagnon, K. C.Saraswat, S. Stemmer, A. Kummel and P. Asbeck, "Interface StudiesofMetalOxideInsulatorsonGeand III-V Semiconductors, " 6th International Symposium on Advanced Gate Stack Technology, San Francisco, August 23-26, 2009. Invited.
    51. Paul C. McIntyre, Y. Oshima, E. Kim and K. C. Saraswat, " Interface studies of ALD-grown metal oxide insulators on Ge and III-V semiconductors, " Microelectronic Engineering, Vol. 86, No. 9, pp. 1536-1539, Sept. 2009. Invited .
    52. Kyung-Hoae Koo, P. Kapur, and K. C. Saraswat, "Compact Performance Models and Comparisons for Gigascale On-Chip Global Interconnect Technologies," IEEE Trans. Elec. Dev., Vol. 56, No. 9, pp. 1787- 1798, Sept. 2009, Invited .
    53. Krishna C. Saraswat, "High Performance Nanoscale FETs and Optoelectronic Devices for Interconnects in Germanium Integrated on Silicon," 1st Int. Workshop on Si based nanoelectronics and photonics (SiNEP-09), Vigo, Spain, Sept. 21-23, 2009. Keynote address.
    54. K. C. Saraswat, Hoyeol Cho, Pawan Kapur, and Kyung-Hoae Koo, "Performance Comparison between Copper, Carbon Nanotube, and Optical Interconnects," IEEE Int. Symp. on Circuits & Systems, pp. 2781 "ì 2784, Seattle, May 21, 2008. Invited
    55. T. Krishnamohan and K. C. Saraswat, `` High Mobility Ge and III-V Materials and Novel Device Structures for High Performance Nanoscale MOSFETS," ESSDERC, Edinburgh September 2008, Plenary talk
    56. K. C. Saraswat, D. Kim, T. Krishnamohan, D. Kuzum, A. K. Okyay, A. Pethe and H.-Y. Yu ``Germanium for High Performance MOSFETs and Optical Interconnects," The Electrochemical Society Transactions, vol. 16 # (10) pp. 3-12, 2008, also presented at the 214th ECS Meeting, Honolulu, October 2008, Plenary talk
    57. K. C. Saraswat, "Research Through Collaboration between Academia and Industry," 2nd Int. Symp. on Solutions Research, Tokyo, Japan, March 2007. Invited
    58. K. C. Saraswat, "High Mobility Materials and Novel Device Structures for High Performance Nanoscale MOSFETs," 3rd International Nanotechnology Conference (INC3), Brussels, April 17, 2007. Invited
    59. K. C. Saraswat, "High Mobility Channel Materials for Future CMOS," 2007 VLSI-TSA Symposium, April 2007, Hsinchu, Taiwan. Invited
    60. K. C. Saraswat,"Performance Limitations of Cu/low-k Interconnects and Possible Alternatives," IEEE Int. Interconnect Tech. Conf., June 2007, San Francisco, Invited Short Course
    61. T. Krishnamohan, D. Kim, C. Nguyen, C. Jungemann, Y. Nish and K. C. Saraswat, "High Mobility, Low Band To Band Tunneling (BTBT), Strained Germanium, Double Gate (DG), Heterostructure FETs : Simulations", IEEE Trans. Electron Dev., Vol. 53, No. 5, May 2006, pp. 1000-1009. Invited
    62. T. Krishnamohan, Z. Krivokapic, K. Uchida, Y. Nish and K. C. Saraswat, "High Mobility, Ultra Thin (UT), Strained Ge MOSFETs On Bulk and SOI With Low Band To Band Tunneling (BTBT) Leakage : Experiments", IEEE Trans. Electron Dev. Vol. 53, No. 5, May 2006, pp. 990-999. Invited
    63. K. C. Saraswat, C. O. Chui, T. Krishnamohan, D. Kim, A. Nayfeh and A. Pethe, "High Performance Germanium MOSFETs", Symp. B, E-MRS IUMRS ICEM Spring Meet., Nice (France), May 29 - June 2, 2006. Published in Materials Science and Engineering: B, Vol. 135, No. 3 , 15 Dec. 2006, pp.242-249. Invited
    64. K. C. Saraswat and T. Krishnamohan, "Physics and Technology of High Performance, Strained Germanium Channel, Heterostructure MOSFETs", IEEE Int. Workshop on Nano CMOS, Mishima, Japan. 2006. Invited
    65. P. McIntyre, D. Chi, C. Chui, H. Kim, K. Seo and K. Saraswat, "Interface Layers for High-k/Ge Gate Stacks: Are They Necessary?," Proc. Symp. SiGe and Ge Materials, Processing, and Devices, 210th Electrochem. Soc. Meet., Cancun, Mexico, Nov. 2006, Invited .
    66. K. Saraswat, "Germanium MOSFETs for Nanoelectronics," Proc. Symp. SiGe and Ge Materials, Processing, and Devices, 210th Electrochem. Soc. Meet., Cancun, Mexico, Nov. 2006, Invited .
    67. Ali K. Okyay, A. M. Nayfeh, K. C. Saraswat, A. Marshall, P. C. McIntyre and T. Yonehara, " Strain Enhanced High Efficiency Germanium Photodetectors in the Near Infrared for Integration with Si", Optics Letters, Invited
    68. K. C. Saraswat, C. O. Chui, T. Krishnamohan and A Pethe, "High Mobility Materials and Novel Device Structures for High Performance Nanoscale MOSFETs," IEEE Int. Electron Dev. Meet. San Francisco, Dec. 2006. Invited .
    69. K. C. Saraswat, "An Overview of Advanced Interconnect Solutions," 1st Int. Workshop on Interconnect Design and Variability, 2006, Bangalore, India, Dec. 28-29, Invited .
    70. K. C. Saraswat, "Collaborative Research Centers in USA in Electronics," Birla Institut of Technology & Science, Bangalore Campus, 27 Dec. 2006 Inaugural Address.
    71. K. C. Saraswat, C. O. Chui, A. Nayfeh, H. Kim, A. K. Okyay and P. C. McIntyre, "Ge Based High Performance Nanoscale MOSFETs and Integrated Optical Interconnects", SEMI Technology Symposium (STS) 2005, Seoul, Korea, February 2005. Invited
    72. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. Nayfeh and R. S. Shenoy, "Performance Limitations of Si CMOS and Alternatives for Nanoelectronics", The 2005 SEMI-ECS International Semiconductor Technology Conference (ISTC) March 15-17, 2005, Shanghai. Invited
    73. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. Nayfeh and P. C. McIntyre, "Ge Based High Performance Nanoscale MOSFETs", MRS 2005 Spring Meeting, Symposium on Advanced Gate Dielectric Stacks on High-Mobility Semiconductors, Paper G14.1, San Francisco, CA, March 28-April1, 2005. Invited
    74. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. Nayfeh, H. Kim and P. McIntyre, "Ge Based High Performance MOSFETs", Int. Conf. on Insulating Films on Semiconductors (INFOS), Leuven, Belgium, June 2005. Invited
    75. K. C. Saraswat, "The Need for New Materials to Scale CMOS Devices", IEEE Int. Symp. On Semiconductor Manufacturing (ISSM), San Jose, Sept. 2005. Invited
    76. K. C. Saraswat, A. Nayfeh and C. O. Chui, "Gate Dielectrics for Ge MOS Technology" 208th Meeting of The Electrochem. Soc., Abs. No. 489, Los Angeles, October 2005. Invited
    77. P.C. McIntyre, H. Kim, K-I. Seo, C.O. Chui, B.B. Triplett, D-I. Lee, P. Pianetta, S. Stemmer and K.C. Saraswat "Interface Engineering for High-k/Si and High-k/Ge Structures"ô"ô Mishima Japan conference paper, Invited .
    78. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. Nayfeh, "Innovative Device Structures And New Materials For Nanoelectronics", IWPSD, 2005, New Delhi, India, Dec. 2005. Invited
    79. K. C. Saraswat, "Performance Limitations of Si CMOS and Alternatives for Nanoelectronics", iMAPS India National Conference on Microelectronics & VLSI, IIT Bombay, India, Dec. 19-21, 2005. Invited
    80. P. McIntyre, H. Kim, D. Chi, C. O. Chui, B. Triplett, A. Javey, H. Dai, and K. C. Saraswat, "Novel Deposition Processes for High-k/Ge Devices: Interface Engineering," to be presented in MRS 2004 Spring Meeting, Symposium on Joint Session: High-k and High Mobility Substrates, Paper B5.1/D5.1, San Francisco, CA, April 12-16, 2004. Invited
    81. K. C. Saraswat, "Performance Limitations of Devices and Interconnects and Possible Alternatives for Nanoelectronics," IEEE Symp. Quality Electronic Design, San Jose, March 24, 2004. Plenary talk.
    82. K. C. Saraswat, "3-Dimensional ICs: Motivation, Performance Analysis and Technology," SEMATECH Conf. on 3D Architectures for Semiconductor Integration and Packaging, April 13-15, 2004, San Francisco. Invited
    83. C. O. Chui and K. C. Saraswat, "Low Thermal Budget Ge MOS Technology," 205th Meeting of The Electrochem. Soc., Abs. No. 254, San Antonio, May 2004. Invited
    84. K. C. Saraswat, "Ge Based High Performance Nanoscale MOSFETs and Integrated Optical Interconnects", US-India Workshop on Nanotechnology, Bangalore Aug. 11-13, 2004. Invited
    85. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. K. Okyay, H. Kim and P. McIntyre, "Ge and SiGe for High Performance MOSFETs and Integrated Optical Interconnects", Int. Conf. on Solid State Dev. And Mat. (SSDM), Tokyo, July 2004. Invited
    86. K. C. Saraswat, C. O. Chui, A. Neyfeh, H. Kim and P. McIntyre, "Ge Surface Passivation for High Performance MOSFETs", IEEE SISC Conf. San Diego, Dec. 2004. Invited
    87. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. Nayfeh and R. Shenoy, "Performance Limitations of Devices and Interconnects and Possible Alternatives for Nanoelectronics," IEEE Advanced Workshop on 'Frontiers in Electronics' WOFE 2004, Aruba, Dec. 2004. Invited
    88. K. C. Saraswat, P. Kapur and S. Souri, "Performance Limitations of Metal Interconnects and Possible Alternatives," 203rd Meeting of the Electrochem. Soc., Paris, April 2003. (Invited)
    89. K. C. Saraswat, C. O. Chui, P. C. McIntyre and B. B. Triplett, "Novel Germanium Technology and Devices for High Performance MOSFETs and Integrated On-chip Optical Clocking," 203rd Meeting of the Electrochem. Soc., Paris, April 2003. (Invited)
    90. K. C. Saraswat, "Multi University Research Centers in USA for Device and Interconnect Research," Advanced Metallization Conference 2003, Tokyo, Japan, September 2003. Keynote talk
    91. C. O. Chui, H. Kim, J. P. McVittie, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, "A Novel Self-aligned Gate-last MOSFET Process Comparing the High-k Candidates," IEEE 2003 International Semiconductor Device Research Symposium (ISDRS) Proceedings, pp. 464-465, Washington, DC, December 10-12, 2003.Invited
    92. Krishna Saraswat, P. Kapur, G. Chandra, T.-Y. Chiang, S. Souri, "Scaling Induced Performance Limitations of Metal Interconnects," IEEE ISSCC Microprocessor Design Workshop, San Francisco, February 2002. (Invited)
    93. P. Kapur, G. Chandra and K. C. Saraswat, "Performance Limitations of Metal Interconnects and Possible Alternatives," Presented at the SEMICON, San Francisco, July 2002. (Invited)
    94. K. C. Saraswat, "Collaborative Research Centers in USA in Electronics," Opening Ceremony of the National Nanotechnology Researchers Network Centers of Japan, Tokyo, Nov. 25, 2002. (Plenary talk)
    95. J. A. Davis, R. Venkatesan, A. Kaloyeros, M. Beylansky, S. J. Souri, K. Banerjee, K. C. Saraswat, A. Rahman, R. Reif, and J. D. Meindl, "Interconnect Limits on Gigascale Integration(Gsi) In The 21st Century," Proc. IEEE, Vol. 89, No. 3, March 2001, pp. 305~324. (Invited)
    96. K. Banerjee, S. J. Souri, P. and K. C. Saraswat, "3-D ICs: A Novel Chip Design for Improving Deep Submicron Interconnect Performance and Systems-on-Chip Integration," Proc. IEEE, Vol. 89, No. 5, May 2001, pp. 602-633. (Invited)
    97. K. Banerjee, S. J. Souri, P. Kapur, K. C. Saraswat, "3-D Heterogeneous ICs: A Technology for the Next Decade and Beyond, 5th IEEE Workshop on Signal Propagation on Interconnects," Venice, Italy, May 2001. (Invited)
    98. K. C. Saraswat, K. Banerjee, A. R. Joshi, P. Kalavade, S. J. Souri and V. Subramanian, "3-D ICs: Performance Analysis, and Technology," 197th Meeting of the Electrochem. Soc., Toronto, May 2000. (Invited)
    99. K. C. Saraswat, K. Banerjee, A. R. Joshi, P. Kalavade, P. Kapur and S. J. Souri, "3-D ICs: Motivation, Performance Analysis, and Technology" 26th European Solid-State Circuits Conference, Stockholm, Sweden, September 2000. (Invited)
    100. K. C. Saraswat and T. C. Yang "Dependence of Oxide Electric Field and Gate Electrode Workfunction on the Reliability of Thin MOS Gate Oxides," Abs. No. 123 in Proc 195th Meeting of the Electrochem. Soc., Seattle, May 1999. (Invited)
    101. Krishna C. Saraswat, "Polycrystalline-SiGe applications in Si CMOS Technology," Proc. Int. Conf. on Silicon Epitaxy and Heterostructures, September 1999, Japan. (Invited)
    102. K. C. Saraswat, S. J. Souri, V. Subramanian, A. R. Joshi, and A. W. Wang, "Novel 3-D Structures," Proc. 1999 IEEE Int. SOI Conf. pp.54-55, October 4-7, 1999. (Invited)
    103. K. C. Saraswat and V. Subramanian, "Seeding Technology for High Performance TFTs," Proc. Electronic Display Forum 98, EIAJ/SEMI, Yokohama April 1998, pp.2.7~2.15. (Invited)
    104. K. C. Saraswat, S. Jurichich, V. Subramanian, and A. Wang, "A low temperature polycrystalline Si TFT technology for large area AMLCD drivers," MRS spring meeting, April 1997, San Francisco. (Invited)
    105. K. C. Saraswat, N. Bhat and T. C. Yang, "Effect Of Interface Stress on Reliability of Gate Oxide," 4th Symp. on Silicon Nitride and Silicon Oxide Thin Insulating Films, 191st Meeting of the Electrochem. Soc., Montreal, Canada, May 1997. (Invited)
    106. K. C. Saraswat, Y. Chen and B. T. Khuri-Yakub, "Modeling Measurements and Control of Rapid Thermal Processing," In Transient Thermal Processing Techniques in Electronic Materials, Edited by N.M. Ravindra and R.K. Singh, Proc. TMS Symp., Anaheim, Feb. 1996, pp. 3~10. (Invited)
    107. K. C. Saraswat, "Scaling Limits for Interconnect Technology," VLSI Multilevel Interconnect Conference, State-of-the-art Seminar, Santa Clara, June 21, 1996. (Invited)
    108. K. C. Saraswat, S. Jurichich, T. J. King, V. Subramanian, and A. Wang, "A Low Temperature Polycrystalline SiGe CMOS TFT Technology for Large Area AMLCD Drivers, TFT III Symp., 190th meet. Electrochem. Soc., San Antonio, October 1996. (Invited)
    109. K. C. Saraswat, Y. Chen, L. Degertekin, and B. T. Khuri-Yakub, "A New Flexible Rapid Thermal Processing System," Proc. MRS Symp., Rapid Thermal and Integrated Processing IV, Vol. 387, pp. 35~57, 1995. (Invited)
    110. K. C. Saraswat, "Adaptable IC Manufacturing Systems for the 21st Century," E-MRS, 1993 Spring Meeting, Strasbourg, May 4-7, 1993. Published in Microelectronic Engineering, vol. 25, (1994), pp. 131~137. (Invited)
    111. S. Wood, P.P. Apte, K. C. Saraswat J.M. Harrison, "Economic Impact of Single Wafer Multiprocessors," Proc. SPIE Symp. on Rapid Thermal and Related Processing Techniques, October 1990, Santa Clara, Vol. 1393, pp. 36~48. (Invited)
    112. J.P. McVittie, A.J. Bariya, J.C. Rey, S. Ravi, K. C. Saraswat, M.M. Islam Raja and L-Y. Cheng, "SPEEDIE Simulation of Profile Evolution During Etching and Deposition," SPIE Symp. on Microelectronic Processing Integration, October 1990, Santa Clara, SPIE Proceedings Vol. 1392. (Invited)
    113. B.T. Khuri-Yakub, K. C. Saraswat, Y. J. Lee and S. Bhardwaj, "photoacoustic Technique for Thin Film Thickness and Temperature Measurements in Semiconductor Processing," Workshop on Tungsten and Other Advanced Metals for ULSI Applications VII, Dallas, October 1990. (Invited)
    114. K. C. Saraswat, P. Wright, S. Wood and M. M. Moslehi, "Single Wafer In-situ Multiprocessing," 1989 Int. Symp. on VLSI Technology, Systems and Applications, May 1989, . (Invited)
    115. K. C. Saraswat, M. M. Moslehi, D. D. Grossman, S. Wood, P. Wright and L Booth "Single Wafer Rapid Thermal Multiprocessing: A New Concept in Manufacturing," Proceedings of MRS Symp. on Rapid Thermal Annealing/CVD and Integrated Processing, Vol. 146, pp. 3-13., Materials Research Society, April 1989, San Diego. (Invited)
    116. K. C. Saraswat, L. Booth, D. D. Grossman, B. T. Khuri-Yakub, Y. J. Lee, M. M. Moslehi, and S. Wood, "Rapid Thermal Multiprocessing for Micro Factories," 1989 SPIE Symp. on Microelectronic Processing, 8~11 October 1989, Santa Clara. (Invited)
    117. K. C. Saraswat, "Single Wafer In-situ Multiprocessing," Semicon Japan Digest of Technical Papers, November 1988, Tokyo. (Keynote Address) LI>K. C. Saraswat, F. C. Shone and J. D. Plummer,"Modeling of Dopant Diffusion and Redistribution in WSi2/Si Structures," Workshop on Metals, Dielectrics, and Interfaces for VLSI, San Juan Batista, May 9~12, 1988. (Invited)
    118. M. Moslehi, K. C. Saraswat and S.C. Shatas, "Rapid Thermal Growth of Thin Insulators on Silicon," Presented at the SPIE's O-E/LASE '86, January, 1986, Los Angeles. (Invited)
    119. K. C. Saraswat, "Interconnections for VLSI," International Conf. on Semiconductor and Integrated circuit Technology, Beijing, China, October 1986. (Invited)
    120. K.C. Saraswat, "Use of Silicides Obtained by CVD in VLSI," Presented at the Workshop on Silicides. Florence, Italy, October 1985. (Invited)
    121. K. C. Saraswat, "Refractory Metals and Silicides for VLSI Applications," Presented at 32nd Symp. American Vac. Soc. . Houston, November 1985. (Invited)
    122. D.C. Paine, J.C. Bravman and K. C. Saraswat, "Microstructural Characterization of LPCVD Tungsten Interfaces," In Proceedings of Workshop on Tungsten and other Refractory Metals for VLSI Applications, Albuquerque, , pp. 117~123, Edited by R.S. Blewer, October 1985. (Invited)
    123. K. C. Saraswat, "Refractory Materials for Interconnections in VLSI," AIME Electronic Materials Conference, Vermont, June 1983. (Invited)
    124. K. C. Saraswat, "Refractory Metal Silicides for Interconnections in VLSI," American Physics Society, Dallas, March 1982. (Invited)
    125. K. C. Saraswat, "VLSI Interconnections Technology, Present and Future," 9th Annual EOS/ESD Symp. Orlando, Florida, September 1987. (Keynote Address)
    126. K. C. Saraswat, "WSi2 Interconnections for VLSI," International Conference on Metallurgical Coatings, San Francisco, April 1981. (Invited)
    127. K. C. Saraswat, "Physical and Electrical Properties of Polycrystalline Silicon Thin Films," Proceedings of Symposium on Grain Boundaries in Semiconductors, Materials Research Society, Boston, November 16-19 1981, pp. 261~274, Volume 5. (Invited)
    128. J. D. Meindl, N.K. Ratnakumar, L. Gerzberg and K. C. Saraswat, "Circuit Scaling Limits for Ultra-Large-Scale Integration," Technical Digest of the International Solid State Circuits Conference, New York, February 1981. (Invited)
    129. K. C. Saraswat and F. Mohammadi, "Tungsten Silicide for MOS Gates and Low Resistivity Interconnections," AIME, Ithaca, Cornell University, June 1980, The 22nd Electronics Materials Conference. (Invited)
    130. J. D. Meindl, K. C. Saraswat and J. D. Plummer, "The Need of Process Models in an Ubiquitous Technology," The Electrochemical Society, Inc., Princeton, New Jersey, 1977, pp. 894~909. (Invited)

      Book Chapters
    131. K. C. Saraswat, "Germanium Back to the Future," In 75th Anniversary of the Transistor, (edited by A. Nathan, S. K. Saha R. M.Todi) pp. 415 - 429, IEEE Press, Wiley, 2023.
    132. K.-H. Koo and K. C. Saraswat, "Study of performances of low-k Cu, CNTs, and Optical interconnects," in Nanoelectronic Circuit Design, (edited by N. Jha and D. Chen), Springer, 2011, pp. 377-408.
    133. T. Krishnamohan, D. Kim and K. C. Saraswat, "Properties and Trade-offs of Compound Semiconductor MOSFETs" in Fundamentals of III-V Semiconductor MOSFETs, (edited by S. Oktyabrsky and P. D. Ye, Springer, 2010), pp. 7-30.
    134. C. O. Chui and K. C. Saraswat, "Germanium Nanodevices and Technology," In Advanced Gate Stacks for High-Mobility Semiconductors (edited by A. Dimoulas, E. Gusev, P. McIntyre, and M. Heyns), Springer-Verlag, London.
    135. C. O. Chui and K. C. Saraswat, "Advances Germanium MOS Devices," Germanium-Based Technologies: From Materials to Devices (edited by C. Claeys and E. Simoen), Elsevier Science, 2007.
    136. P. C. McIntyre, H. S. Kim and K. C. Saraswat, "Structural Evolution And Point Defects In Metal Oxide-Based High-K Gate Dielectrics," in Defects in High-k Dielectric Stacks (edited by E. Gusev, Springer, 2006), pp. 109-120.
    137. C. O. Chui and K. C. Saraswat, "Nanoscale Germanium MOS Dielectrics and Junctions," Germanium-Based Technologies: From Materials to Devices (edited by C. Claeys and E. Simoen), Elsevier Science, 2007.
    138. K. C. Saraswat, C. O. Chui, P. Kapur, T. Krishnamohan, A. Nayfeh, A. K. Okyay, and R. S. Shenoy, "Performance Limitations of Si CMOS and Alternatives for Nanoelectronics," Frontiers in Electronics: Proceedings of the WOFE-04 (edited by H. Iwai, Y. Nishi, M. S. Shur, and H. Wong), World Scientific, New Jersey, 2006.
    139. S. J. Souri, T.-Y. Chiang, P. Kapur, K. Banerjee and K. C. Saraswat, "3-D IC Deep Submicron Interconnect Performance Modeling and Analysis," In Interconnect Technology and Design for Gigascale Integration, (Edited by J. A. Davis and J. D. Meindl) Kluwer Academic Publishers, Boston, October 2003, pp. 325 - 382.
    140. K. C. Saraswat, "Rapid Thermal Multiprocessing for a Programmable Factory For Manufacturing of ICs," in Advances in Rapid Thermal and Integrated Processing (Edited by F. Roozeboom), Kluwer Academic Publishers, Dordrecht, The Netherlands, 1996, pp. 375-414.
    141. P. Apte, T. Kubota and K. C. Saraswat, ``Constant Current Stress Breakdown in Ultrathin SiO2Films," in The Physics and Chemistry of SiO2 and the Si SiO2 Interface 2, edited by C. R. Helms and B. E. Deal, Plenum, 1993, pp. 447--454.
    142. K. C. Saraswat, "Chinese Microelectronics," W. J. Spencer, J. Y. Chen, A. Chiang, W. Frieman, E. S. Kuh, J. L. Moll, R. F. Pease and K. C. Saraswat, FASAC Technical Assessment Report (TAR) 4060, Science Application International Corp., April 1989


      143. Regular Papers

      2024
    143. L. Hoang, M. Jaikissoon, Z. Zhang, K.C. Saraswat, E. Pop, A.J. Mannix, "Contact-induced Strain for Enhanced Performance in Monolayer WS2 Transistors," APS March Meeting, Mar 2024, Minneapolis MN
    144. Jerry Yang, E. Reato, T. Knobloch, Jung-Soo Ko, Z. Zhang, A. Mannix, K. Saraswat, T. Grasser, M. Lemme, E. Pop, "Quantifying Defect-Mediated Electron Capture and Emission in Flexible Monolayer WS2 Field-Effect Transistors," 2024 Device Research Conference. June 2024,
    145. E. Reato, P. Palacios, J. Yang, S. Wahid, M. Jaikissoon, J.-S. Ko, A. Daus, M. Saeed, K. Saraswat, R. Negra, E. Pop, M. Lemme, "Nanoscale MoS2 Transistors on Polyimide for Radio-Frequency Operation" 2024 Device Research Conf., June 2024.
    146. Jung-Soo Ko, A. Shearer, S. Lee, K. Neilson, M. Jaikissoon, K. Kim, S. Bent, K. Saraswat and E. Pop, ÒAchieving -nm-Scale Equivalent Oxide Thickness Top Gate Dielectric on Monolayer Transition Metal Dichalcogenide Transistors with CMOS-Friendly Approaches,Ó VLSI Symp., Honolulu, June 2024.
    147. Marc Jaikissoon, E. Pop, K. C. Saraswat, "Strain Induced by Evaporated-Metal Contacts on Monolayer MoS2 Transistors," IEEE Electron Dev. Lett., Vol. 45, No. 8, pp. 1528-1531, Aug 2024.
    148. Kathryn Neilson, S. Hamtaei, K. N. Nazif, J. Carr, S. Rahimisheikh, F. Nitta, G. Brammertz, J. Blackburn, J. Hadermann, K. Saraswat, O. Reid, B. Vermang, A. Daus, E. Pop, "Toward Mass-Production of Transition Metal Dichalcogenide Solar Cells: Scalable Growth of Photovoltaic-Grade Multilayer WSe2 by Tungsten Selenization" ACS Nano, DOI: 10.1021/acsnano.4c03590, August 2024.
    149. Jung-Soo Ko, A. B. Shearer, S. Lee, K. M. Neilson, M. Jaikissoon, K. Kim, S. F. Bent, E. Pop and K. C. Saraswat "Achieving 1-nm-Scale Equivalent Oxide Thickness Top Gate Dielectric on Monolayer Transition Metal Dichalcogenide Transistors with CMOS-Friendly Approaches," IEEE Trans. Electron Dev., Accepted

      150. 2023
    150. Koosha Nassiri Nazif, F. Nitta, A. Daus, K. Saraswat, E. Pop, ÒPerformance Limits of Transition Metal Dichalcogenide Solar Cells,Ó 2023 Middle East and North Africa Solar Conference (MENA-SC), Dubai, November 15 Ð 18, 2023.
    151. J. -S. Ko, Z. Zhang, S. Lee, M. Jaikissoon, R. K. A. Bennett, K. Kim, A. C. Kummel, P. Bandaru, E. Pop, K. C. Saraswat, ÒUltrathin Gate Dielectric Enabled by Nanofog Aluminum Oxide on Monolayer MoS2Ó, ESSDERC (European Solid-State Device Conference), Sep 2023, Lisbon Portugal
    152. Joel Martis, S. Susarla, A. Rayabharam, C. Su, T. Paule. P. Pelz, C. Huff, X. Xu, H.-K. Li, M. Jaikissoon, V. Chen, E. Pop, K. Saraswat, A. Zettl, N. R. Aluru, R. Ramesh, P. Ercius, A. Majumdar, ÒImaging the electron charge density in monolayer MoS2 at the Angstrom scale,Ó Nature Commun. 14, 4363 (2023).
    153. Alwin Daus, L. Hoang, C. Gilardi, S. Wahid, J. Kwon, S. Qin, J.-S. Ko, M. Islam, A. Kumar, K. M. Neilson, K. C. Saraswat, S. Mitra, H.-S. P. Wong and E. Pop, ÒEffect of Back-Gate Dielectric on Indium Tin Oxide (ITO) Transistor Performance and Stability,Ó IEEE Trans. Electron Dev., Vol: 70, No: 11, pp. 5685-5689, Nov. 2023.
    154. Koosha Nassiri Nazif, F. U. Nitta, A. Daus, K. C. Saraswat and E. Pop, ''Efficiency Limit of Transition Metal Dichalcogenide Solar Cells,'' IEEE Photovoltaic Specialists Conference, June 15, 2023, San Juan, Puerto Rico.
    155. Peter Ercius, J. Martis, S. Susarla, A. Rayabharam, C. Su, T. Paule, P. Pelz, C. Huff, X. Xu, H.-K. Li, M. Jaikissoon, V. Chen, E. Pop, K. Saraswat, A. Zettl, N. Aluru, R. Ramesh, and A. Majumdar, "Imaging the electron charge density in monolayer MoS2 at the ngstrom scale," Accepted
    156. J. -S. Ko, Z. Zhang, S. Lee, M. Jaikissoon, R. K. A. Bennett, K. Kim, A. C. Kummel, P. Bandaru, E. Pop, K. C. Saraswat, ÒUltrathin Gate Dielectric Enabled by Nanofog Aluminum Oxide on Monolayer MoS2Ó, ESSDERC, Sep 2023, Lisbon Portugal

      157. 2022
    157. X. Wu, A. I. Khan, P. Ramesh, C. Perez, K. Kim, Z. Lee, K.E. Goodson, K. Saraswat, H.-S.P. Wong, E. Pop, "Interface-Controlled Ultralow Resistance Drift and Its Origin in Superlattice Phase Change Memory," IEEE Device Research Conference (DRC), June 2022, Columbus OH
    158. Asir Intisar Khan, C. Perez, X. Wu, B. Won, K. Kim, H. Kwon, P. Ramesh, K.M. Neilson, M. Asheghi, K. Saraswat, Z. Lee, I.K. Oh, H.-S.P. Wong, K.E. Goodson, E. Pop "First Demonstration of Ge2Sb2Te5-Based Superlattice Phase Change Memory with Low Reset Current Density (~3 MA/cm2) and Low Resistance Drift (~0.002 at 105oC)," IEEE VLSI Tech. Symp., Jun 2022, Honolulu HI
    159. Marc Jaikissoon, J.A. Yang, K.M. Neilson, E. Pop, K. Saraswat, "Mobility Enhancement of Monolayer MoS2 Transistors using Tensile-Stressed Silicon Nitride Capping Layers," IEEE Device Research Conference (DRC), June 2022, Columbus OH
    160. L. Hoang, A. Daus, S. Wahid, J. Kwon, J.-S. Ko, S. Qin, M. Islam, K.C. Saraswat, H.-S.P. Wong, E. Pop, "Bias Stress Stability of ITO Transistors and its Dependence on Dielectric Properties," IEEE Device Research Conference (DRC), June 2022, Columbus OH.
    161. S.Wahid, A.Daus, J.Kwon, S.Qin, J.S.Ko, K.Saraswat, E.Pop,"First Demonstration of Top Gated ITO Transistors: Effect of Channel Passivation", IEEE Device Research Conference, June 2022.
    162. Alwin Daus, M. Jaikissoon, A. I. Khan, A. Kumar, R. W. Grady, K. C. Saraswat, E. Pop, ÒFast-Response Flexible Temperature Sensors with Atomically Thin Molybdenum Disulfide,Ó Nano Letters, July 2022, 10.1021/acs.nanolett.2c01344.
    163. Asir Intisar Khan, X. Wu, C. Perez, B. Won, K. Kim, P. Ramesh, H. Kwon, M. C. Tung, Z. Lee,, I.-K. Oh, K. Saraswat, M. Asheghi, K. E. Goodson, H.-S. Philip Wong and E. Pop, "Unveiling the Effect of Superlattice Interfaces and Intermixing on Phase Change Memory Performance," Nano Letters, 2022, DOI 10.1021/acs.nanolett.2c01869
    164. Kwan-Ho Kim, M. Andreev,; S. Choi, J. Shim, H. Ahn, J. Lee, K. N. Nazif, A. Kumar, J. Lynch, D. Jariwala, K. Saraswat, J.-H.Park, "High-Efficiency WSe2 Photovoltaic Devices with Electron-Selective Contacts," ACS Nano, 2022, DOI 10.1021/acsnano.1c10054
    165. R. Islam, S. Qin, S. Deshmukh, Z. Yu, ‚. Koroglu, A.I. Khan, K. Schauble, K.C. Saraswat, E. Pop, H.-S.P. Wong, "Improved Gradual Resistive Switching Range and 1000x On/Off Ratio in HfOx RRAM Achieved with a Ge2Sb2Te5 Thermal Barrier," Appl. Phys. Lett. Accepted, pre-print arXiv:2203.12190 (2022)
    166. Sanchit Deshmukh, M. M. Rojo, E. Yalon, S. Vaziri, C. Koroglu, R. Islam, R. A. Iglesias, K. Saraswat, E. Pop, "Direct Measurement of Nanoscale Filamentary Hot Spots in Resistive Memory Devices," Science Advances, 8, eabk1514, 30 March 2022.
    167. Jung-Soo Ko, Kirstin Schauble, Krishna Saraswat, Eric Pop, "Integrating Ultrathin Gate Dielectrics on 2D Materials for High-Performance Transistors," MRS Symp. NM02, Honolulu, May 12, 2022.
    168. Marc Jaikissoon, Jerry Yang, Eric Pop, Krishna Saraswat, "Strain Engineering Metal Contacts to Monolayer MoS2 Transistors," MRS Symp. NM02, Honolulu, May 12, 2022.
    169. Kathryn Neilson, Marc Jaikissoon, Connor Bailey, Krishna Saraswat, Eric Pop, "Synthesis and Characterization of Monolayer and Few-Layer InSe Electronics," MRS Symp. NM01, Honolulu, May 13, 2022.
    170. Aravindh Kumar, Kirstin Schauble, Kathryn Neilson, Alvin Tang, Pranav Ramesh, Eric Pop, Krishna Saraswat, "In, Sn and Bi Contacts to Monolayer MoS2 Alloying for Temperature Tolerance and Silicon CMOS Compatibility," MRS Symp. NM01, Honolulu, May 13, 2022.
    171. Kirstin Schauble, Aravindh Kumar, Stephanie Bohaichuk, Ryan Grady, Krishna Saraswat, Eric Pop, "Ultrathin Germanium as an Interlayer for Silver Contacts to Monolayer MoS2," MRS Symp. NM01, Honolulu, May 13, 2022.


      172. 2021

    172. Koosha Nassiri Nazif, A. Daus, J. Hong, N. Lee, S. Vaziri, A. Kumar, F. Nitta, M. E. Chen, S. Kananian, R. Islam, K.-H. Kim, J.-H. Park, A. Poon, M. L. Brongersma, E. Pop, and K. C. Saraswat, High-Specific-Power Flexible Transition Metal Dichalcogenide Solar Cells", Nature Communications, 9 Dec 2021, DOI 10.1038/s41467-021-27195-7
    173. Aravindh Kumar, K. Schauble, K. M. Neilson, A. Tang, P. Ramesh, H.-S. P. Wong, E. Pop and K. Saraswat, "Sub-200 ½áµm Alloyed Contacts to Synthetic Monolayer MoS2," IEEE IEDM, Dec. 13-15, 2021
    174. Alvin Tang, A. Kumar, M. Jaikissoon, K. Saraswat, H.-S. P. Wong and E. Pop, "Towards Low Temperature Solid Source Synthesis of Monolayer MoS2, " ACS Applied Materials and Interfaces 2021, https://doi.org/10.1021/acsami.1c06812
    175. A. Rezk, S. A. Hadi, J. M. Ashraf, A. Alhammadi, W. Alnaqbi, A. Kumar, G. Dushaq, M. Rasras, K. Saraswat, M. Nayfeh, and A. Nayfeh "Strong Reduction in Ge Film Reflectivity by an Overlayer of 3-nm Si Nanoparticles: Implications for Photovoltaics", ACS Applied Nano Materials, April 1, 2021, DOI: 10.1021/acsanm.1c00107.
    176. Koosha Nassiri Nazif, A. Kumar, J. Hong, N. Lee, R. Islam, C. J. McClellan, O. Karni, J. van de Groep, T. F. Heinz, E. Pop, Ma. L. Brongersma, and Krishna C. Saraswat, "High-performance p-n junction transition metal dichalcogenide photovoltaic cells enabled by MoOx doping and passivation" Nano Lett., 2021, https://doi.org/10.1021/acs.nanolett.1c00015
    177. Aravindh Kumar, A. Tang , H.-S. P. Wong , K. Saraswat, "Improved Contacts to Synthetic Monolayer MoS2â" A Statistical Study." IITC 2021.

      178. 2020
    178. Aravindh Kumar, K. Nassiri Nazif, P. Ramesh, K. Saraswat, "Doped WS2 transistors with large on-off ratio and high on-current," 78th Device Research Conference, June 21-24, 2020.
    179. Aravindh Kumar, K. Nassiri Nazif, P. Ramesh, K. Saraswat, "Doped WS2 transistors with large on-off ratio and high on-current," 78th Device Research Conference, June 21-24, 2020.
    180. Muyu Xue, K. N. Nazif , Z. Lyu, J. Jiang, C.-Y. Lu, N. Lee, K. Zang, Y. Chen, T. Zheng, T. I. Kamins, M. L. Brongersma, K. C. Saraswat, J. S. Harris "Free-standing 2.7 µm Thick Ultrathin Crystalline Silicon Solar Cell with Efficiency above 12.0%", Nano Energy, Volume 72, 2020, 104709

      181. 2019
    181. Seung-Geun Kim, Seung-Hwan Kim, June Park, Gwang-Sik Kim, Jae-Hyeun Park, Krishna Saraswat, Jiyoung Kim, Hyun-Yong Yu, "Infrared Detectable MoS 2 Phototransistor and Its Application to Artificial Multi-Level Optic-Neural Synapse," ACS Nano. 13. 10.1021/acsnano.9b03683 (2019).
    182. Aravindh Kumar, Raisul Islam, Dipankar Pramanik, Krishna Saraswat, "On the Limit of Defect Doping in Transition Metal Oxides," J. Vac. Sci. & Tech. A 37, 021505 (2019); https://doi.org/10.1116/1.5055563
    183. Shashank Gupta, S. Tietz, J. Vuckovic, and K. Saraswat, "A new paradigm for silicon-compatible fabrication of inverse woodpile photonic crystals with a complete band gap," ACS Photonics, ACS Photonics, 2019, 6 (2), pp 368-373
    184. Junkyo Suh, A. C. Meng, M. Jaikissoon1, M. Braun, T. R. Kim, A. F. Marshall, A. Pakzad, P. C. McIntyre and K. C. Saraswat, "3D-stacked Strained SiGe/Ge Gate-All-Around (GAA) Structure Fabricated by 3D Ge Condensation," 77th IEEE Device Res. Conf. Ann Arbor, Michigan, June 23-26, 2019.
    185. Junkyo Suh, A. C. Meng, T. R. Kim, A. F. Marshall, A. Pakzad, P.C. McIntyre and K. C. Saraswat,  3D-stacked Highly Strained SiGe/Ge Gate-All-Around (GAA) pFETs Fabricated by 3D Ge Condensation SSDM, Sept 2-5, 2019, Nagoya, Japan.
    186. Junkyo Suh, Q. Li, J. Van de Groep, M. Brongersma and K. C. Saraswat, ÒVertically Stacked Suspended Nanowires by 3D Ge Condensation for Optoelectronic ApplicationsÓ Adv. Metal. Conf., Oct 10-11, 2019, Japan.

      187. 2018
    187. Muyu Xue, R. Islam, Y. Chen, J. Chen, C.-Y. Lu, A . Pleus, C. Tae, K. Xu, Y. Liu, T. I. Kamins, K. C Saraswat, J. S. Harris. ÒCarrier-selective interlayer materials for silicon solar cell contactsÓ, J. Appl. Phys., Vol. 123, # 14, p. 143101, 2018.
    188. Shashank Gupta, S. Tietz, J. Vuckovic, and K. Saraswat, "A new paradigm for silicon-compatible fabrication of inverse woodpile photonic crystals with a complete band gap," ACS Photonics, , 2019, 6 (2), pp 368-373
    189. Junkyo Suh, P. Ramesh, A. C. Meng, A. Kumar, A. Kumar, S. Gupta, R. Islam, P. C. McIntyre, and Krishna Saraswat, "Low Resistance III-V Heterocontacts to N-Ge, " SSDM, Sept. 13, 2018, Tokyo.
    190. Xue, M., Islam, R., Chen, Y., Chen, J., Lu, C. Y., Mitchell Pleus, A., and Saraswat, K. C. "Carrier-selective interlayer materials for silicon solar cell contacts" J. Appl. Phys., 123(14), 2018, 143101.
    191. Raisul Islam and and Krishna C. Saraswat, "Improving Ultra-thin Solar Cell Performance By Contact Selectivity Improvement" Scientific Reports, 8(1), 8863. (2018).
    192. Junkyo Suh, P. Ramesh, A. C. Meng, A. Kumar, A. Kumar, S. Gupta, R. Islam, P. C. McIntyre, and Krishna Saraswat, "Low Resistance III-V Heterocontacts to N-Ge, " SSDM, Sept. Sept. 13, 2018, Tokyo
    193. Shashank Gupta, D. Nam, J. Vuckovic, and K. Saraswat, "Room temperature lasing unraveled by a strong resonance between gain and parasitic absorption in uniaxially strained germanium", Physical Review B, , 97, 155127, 13 April 2018
    194. Muyu Xue, R. Islam, Y. Chen, J. Chen, C.-Y. Lu, A . Pleus, C. Tae, K. Xu, Y. Liu, T. I. Kamins, K. C Saraswat, J. S. Harris. â "Carrier-selective interlayer materials for silicon solar cell contactsâ" J. Appl. Phys., Vol. 123, # 14, p. 143101, 2018.
    195. Muyu Xue, R. Islam, Y. Chen, C.-Y.Lu, Z. Lyu, K. Zang, J. Jia, H. Deng, T. I. Kamins, K. C Saraswat, J. S. Harrisâ"Investigation of Nickel Oxide as Carrier-selective Interlayer for Silicon Solar Cell Contactsâ" 2018 IEEE 7th World Conf. on Photovoltaic Energy Conversion (WCPEC)(A Joint Conf. of 45th IEEE PVSC, 28th PVSEC & 34th EU PVSEC), pp. 2180-2182, 2018.

      196. 2017
    196. Muyu Xue, R. Islam, J. Chen, Z. Lyu, Y. Chen, D. DeWitt, A. Pleus, C. Tae, C.-Y. Lu, K. Zang, J. Jia, Y. Huo, T. I Kamins, K. C Saraswat, J. S Harris, "Ultra-Thin Crystalline Silicon Solar Cells with Nickel Oxide Interlayer as Hole-selective Contact", 2017 IEEE 44th Photovoltaic Specialist Conference, pp. 1835-1837, 2017.
    197. Muyu Xue, R. Islam, A. C Meng, Z. Lyu, C.-Y. Lu, C. Tae, M. R Braun, K. Zang, P. C McIntyre, T. I Kamins, K. C Saraswat, J. S Harris, "Contact selectivity engineering in a 2 μm thick ultrathin c-Si solar cell using transition-metal oxides achieving an efficiency of 10.8%", ACS applied materials and interfaces, Vol. 9, #48, pp. 41863-41870, 2017.
    198. Barth, M., Kumar, A., Warner, J. H., Bennett, B. R., Cress, C. D., Boos, J. B., Roche, N. J., Raine, M., Gaillardin, M., Paillet, P., McMorrow, D., Saraswat, K., Datta, S.Hide, "Single-Event Measurement and Analysis of Antimony-Based p-Channel Quantum-Well MOSFETs With High-k Dielectric." IEEE Trans Nuclear Sci., 2017; 64 (1): 434-440.
    199. Max M. Shulaker, Gage Hills, Rebecca S. Park, Roger T. Howe, Krishna Saraswat, H.-S. Philip Wong, Subhasish Mitra, "3D Smart NanoSystem: Beyond-Silicon Heterogeneous Systems Technology, " Nature, 547, 74-78 (06 July 2017)
    200. Nazek El Atab, U. Ghobadi, Gamze; A. Ghobadi, J. Suh, R. Islam, A. Okyay, K. Saraswat, A. Nayfeh, "Cubic-phase zirconia nano-islands growth using atomic layer deposition and application in low-power charge-trapping nonvolatile-memory devices" Nanotechnology, 2017 Nov 3;28(44): .
    201. Nazek El Atab, I. Saadat, K. C. Saraswat, and A. Nayfeh., "Nano-islands Based Charge Trapping Memory: A Scalability Study for 32-nm node, "IEEE Trans. on Nanotechnology, Vol. 16, No. 6, pp. 1143-1146, Nov. 2017.
    202. S. Bao, D. Kim, C. Onwukaeme, S. Gupta, K. Saraswat, K. Hong Lee, Y. Kim, D. Min, Y. Jung, H. Qiu, H. Wang, E. A. Fitzgerald, C. S. Tan, and D. Nam, "Low-threshold optically pumped lasing in highly strained Ge nanowires", Nature Communications, 8(1):1845, Nov 29, 2017.
    203. M. Morea, C. E. Brendel, K. Zang, J. Suh, C. S. Fenrich, Y.-C. Huang, H. Chung, Y. Huo, T. I. Kamins, K. C. Saraswat, and J. S. Harris, "Passivation of multiple-quantum-well Ge0.97Sn0.03/Ge p-i-n photodetectors", Appl. Phys. Lett., 110, 091109 (2017).
    204. Raisul Islam, G. Chen, P. Ramesh, N. Fuchigami, D. Lee, K. Littau, K. Weiner, R. T. Collins, and K. C. Saraswat, "Investigation of the Changes in Electronic Properties of Nickel Oxide (NiOx) due to UV/Ozone Treatment" ACS Applied Materials and Interfaces, 9 (20), pp. 17201 - 17207, April 27, 2017.
    205. K. Ni, J. A. Smith, M. Barth, H. Liu, J. H. Warner, K. Saraswat, and S. Datta, "Soft Error Evaluation for InGaAs and Ge Complementary FinFETs." IEEE Dev. Res. Conf., Paper P.23, June, 2017.
    206. Max M. Shulaker, Gage Hills, Rebecca S. Park, Roger T. Howe, Krishna Saraswat, H.-S. Philip Wong, Subhasish Mitra, "3D Smart NanoSystem: Beyond-Silicon Heterogeneous Systems Technology, " Nature, 547, 74–78 (06 July 2017)
    207. Gautam Shine and Krishna C. Saraswat, "Analysis of Atomistic Dopant Variation and Fermi Level Depinning in Nanoscale Contacts" IEEE Trans Electron. Dev. vol. 64, no. 9, pp. 3768-3774, Sept. 2017.

      208. 2016
    208. Chris D. English, G. Shine, V. E. Dorgan, K. C. Saraswat1, E. Pop, "Improved Contacts to MoS2 Field-Effect Transistors by Ultra-High Vacuum Metal Deposition," Nano Letters. 16(6) May 2016
    209. R. Islam, K. N. Nazif, and K. C. Saraswat, "Si Heterojunction Solar Cells: A Simulation Study of the Design Issues," IEEE Trans. Electron. Dev. Vol. 63, No. 12, pp. 4788-4795, Dec. 2016
    210. Gautam Shine, C. E. Weber, K. C. Saraswat, "Statistical Limits of Contact Resistivity Due to Atomistic Variation in Nanoscale Contacts," IEEE VLSI Tech. Symp. Honolulu, June 2016.
    211. Shashank Gupta, J. Petykiewicz, D. Nam, D. Sukhdeo, J. Vuckovic and K. Saraswat, "Dramatic and previously overlooked interaction between strain and parasitic absorption in germanium with major implications for Si-compatible lasing," CLEO:2016, Paper # SW1M.4, San Jose, CA, June 2016.
    212. Shashank Gupta, J. Petykiewicz, D. Nam, D. Sukhdeo, J. Vuckovic and K. Saraswat, "Remarkable interplay between strain and parasitic absorption unravelling the best route for Ge based Si-compatible lasing at room temperature," IEEE Photonics Conf., pp. 88-89, Waikoloa, Hawaii, October 2016.
    213. J. Petykiewicz, D. Nam, D. Sukhdeo, S. Gupta, S. Buckley, A. Piggott, J. Vuckovic and K. Saraswat, ``Direct Bandgap Light Emission from Strained Germanium Nanowires Coupled with High-Q Nanophotonic Cavities," Nano Letters, 2016; 16 (4): 2168-2173.
    214. Raisul Islam, Gang Chen, Pranav Ramesh, Reuben Collins, Krishna Saraswat, " Resistivity control of nickel oxide by defect doping through UV/ozone treatment," MRS Spring 2016 meeting, March 2016, Phoenix, Arizona.
    215. Pranav Ramesh, Raisul Islam, Donovan Lee, Kurt Weiner, Krishna Saraswat, "Control of Resistivity and Stoichiometry in Atomic Layer Deposited Titanium Dioxide Using Rapid Thermal Annealing," MRS Spring 2016 meeting, March 2016, Phoenix, Arizona.
    216. Raisul Islam, Nobi Fuchigami, Pranav Ramesh, Donovan Lee, Karl Littau, Kurt Weiner, Krishna Saraswat, "Tuning Stoichiometry in Atomic Layer Deposited NiOx by Changing Deposition Temperature," MRS Spring 2016 meeting, March 2016, Phoenix, Arizona.
    217. Ashwyn Srinivasan, M. Pantouvaki, S. Gupta, H. T. Chen, P. Verheyen, G. Lepage, G. Roelkens, K. Saraswat, D. V. Thourhout, P. Absil, and J. V. Campenhout, "6Gb/s Germanium Waveguide Electro-Absorption Modulator," IEEE/OSA J. Lightwave Technol., Vol. 34, No. 2, pp. 419 - 424, January 15, 2016

      218. 2015
    218. S. Deshmukh, R. Islam, C. Chen, E. Yalon, K. C. Saraswat and E. Pop, "Thermal modeling of metal oxides for highly scaled nanoscale RRAM," 2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Washington, DC, 2015, pp. 281-284.
    219. Raisul Islam, K. N. Nazify, and K. Saraswat, "Optimization of Selective Contacts in Si Heterojunction Photovoltaic Cells Considering Fermi Level Pinning and Interface Passivation," 43rd IEEE Photovoltaic Specialists Conf. June 5-10, 2015, Portland, OR.
    220. David S. Sukhdeo, Y. Kim, S. Gupta, K. C. Saraswat, B. Dutt and D. Nam, " Theoretical Modeling for the Interaction of Tin alloying with N-type Doping and Tensile Strain for GeSn Laser," IEEE Elec. Dev. Lett. Vol. 36, No. 8, August 2015, pp.1307 - 1310.
    221. David S. Sukhdeo, Donguk Nam, Ju-Hyung Kang, Mark L. Brongersma, and Krishna C. Saraswat, "Ge Microdisk with Lithographically-Tunable Strain using CMOS-Compatible Process," Optics Express, DOI:10.1364/OE.23.033249, Vol. 23, No. 26, 28 Dec 2015.
    222. Youngmin Kim, Jan Petykiewicz, Shashank Gupta, Jelena Vuckovic, Krishna C. Saraswat, and Donguk Nam, "Strained Ge Light Emitter with Ge on Dual Insulators for Improved Thermal Conduction and Optical Insulation" IEIE Trans. on Smart Processing and Computing, Vol. 4, No. 5, p. 318-323, October 2015.
    223. G.-S. Kim, S.-H. Kim, J.-K. Kim, C. Shin, J.-H. Park, K. C. Saraswat, B. J. Jo, H.-Y. Yu, "Surface Passivation of Germanium Using SF6 Plasma to Reduce Source/Drain Contact Resistance in Germanium n-FET," IEEE Elec. Dev. Lett. Vol. 36, No. 8, August 2015, pp. 748 -750.
    224. Ju Hyung Nam, F. Afshinmanesh, D. Nam, T. I. Kamins, M. L. Brongersma, and K. C. Saraswat, " Monolithic integration of high performance germanium-on-insulator p-i-n photodetector on silicon," Optics Express, Vol. 23, No. 12, pp. 15816-15823, 15 Jun 2015.
    225. G.-S. Kim, S.-H. Kim, J.-K. Kim, C. Shin, J.-H. Park, K. C. Saraswat, B. J. Jo, H.-Y. Yu, "Surface Passivation of Germanium Using SF6 Plasma to Reduce Source/Drain Contact Resistance in Germanium n-FET," IEEE Elec. Dev. Lett. Vol. 36, No. 8, August 2015, pp. 748 -750.
    226. D. S. Sukhdeo, D. Nam, J.-H. Kang, M. L. Brongersma and K. C. Saraswat, "A Bandgap-Tunable Germanium Microdisk Using Customizable Biaxial Strain for Silicon-Compatible Optoelectronics," Optics Express, Vol. 23, Issue 13, pp. 16740-16749 (2015).
    227. Ju Hyung Nam, S. Alkis, D. Nama, F. Afshinmanesh, J. Shim, J.-H. Park, M. Brongersma, A. K. Okyay, T. I. Kamins, and K. C. Saraswat, "Lateral overgrowth of germanium for monolith icintegration of germanium-on-insulator on silicon," J. Crystal Growth 416 (2015) 21-27, 15 April 2015.
    228. Raisul Islam, Pranav Ramesh, Ju Hyung Nam, Krishna Saraswat, "Nickel Oxide Carrier Selective Contacts for Silicon Solar Cells," 42nd IEEE Photovoltaic Specialists Conf. June 14-19, 2015 New Orleans, LA.
    229. Shashank Gupta, D. Nam, J. Petykiewicz, D. Sukhdeo, J. Vuckovic and K. Saraswat, "A novel, highly-strained structure with an integrated optical cavity for a low threshold germanium laser," CLEO 2015, San Jose, CA, May 2015
    230. Shashank Gupta, S.A. Srinivasan, M. Pantouvaki, H. Chen, P. Verheyen, G. Lepage, D. Van Thourhout, G. Roelkens, K. Saraswat, P. Absil, J. Van Campenhout, "50GHz Ge Waveguide Electro-Absorption Modulator Integrated in a 1615nm Si Photonics Platform," OFC, paper #Tu2A.4, March 2015, Los Angeles.
    231. Wooshik Jung, J. H. Nam, A. Pal, J. H. Lee, Y. Na, Y. Kim, J. H. Lee, and K. C. Saraswat "Reduction of Surface Roughness in Epitaxially Grown Germanium by Controlled Thermal Oxidation" IEEE Electron Dev. Lett. Vol. 36, No. 4, April 2015, pp. 297-299.

      232. 2014
    232. Max M. Shulaker, Tony F. Wu, Asish Pal, Liang Zhao, Yoshio Nishi, Krishna Saraswat, H.-S. Philip Wong and hasish Mitra, "Monolithic 3D Integration of Logic and Memory: Carbon Nanotube FETs, Resistive RAM, and Silicon FETs," IEEE Int. Electron Dev. Meet., San Francisco, December 2014, pp. 27.4.1 ñ 27.4.4.
    233. G. Shine, S. Manipatruni, S. Chaudhry, K.C. Saraswat, D. Nikonov, I.A. Young, "Extended H¬âˆckel Theory for Quantum Transport in Magnetic Tunnel Junctions,"Proc. of IEEE SISPAD, Yokohama, Japan (2014), pp. 301 - 304.
    234. G.-S. Kim, J.-K. Kim, S.-H. Kim, J. Jo, C. Shin, J.-H. Park, K. C. Saraswat, H.-Y. Yu, "Specific Contact Resistivity Reduction Through Ar Plasma-Treated TiO2-x Interfacial Layer to Metal Ge Contact," IEEE Elec. Dev. Lett. Vol. 35, No. 11, November 2014, pp. 1076 -1078.
    235. Jeong-Kyu Kim, G.-S. Kim, H. Nam, C. Shin, J.-H. Park, J. K. Kim, B. J. Cho, K. C. Saraswat, and H.-Y. Yu, "The Efficacy of Metal-Interfacial Layer-Semiconductor Source/Drain Structure on Sub-10-nm n-Type Ge FinFET Performances," IEEE Elec. Dev. Lett. Vol. 35, No. 12, Dec. 2014, pp. 1185-1187.
    236. Raisul Islam, G. Shine, and K. C. Saraswat, "Schottky barrier height reduction for holes by Fermi level depinning using metal/nickel oxide/silicon contacts," Appl. Phys. Lett. 105, 182103 (2014).
    237. J.-K. Kim, G.-S. Kim, C. Shin, J.-H. Park, K. C. Saraswat, and H.-Y. Yu, "Analytical Study of Interfacial Layer Doping Effect on Contact Resistivity in Metal-Interfacial Layer-Ge Structure," IEEE Elec. Dev. Lett. Vol. 35, No. 7, July 2014, pp. 705-707.
    238. Chris D. English, G. Shine, V. E. Dorgan, K. C. Saraswat, and Eric Pop, "Improving Contact Resistance in MoS2 Field Effect Transistors," 72nd IEEE Device Research Conference (DRC), pp. 193-194, June 2014.
    239. D. Nam, D. S. Sukhdeo, S. Gupta, J.-H. Kang, M. L. Brongersma, and K. C. Saraswat, "Study of Carrier Dynamics in Uniaxially Strained Ge for a Low-Threshold Ge Laser," IEEE Journal of Selected Topics in Quantum Electronics Vol. 20, No. 4, July/August 2014,  16-22.
    240. Raisul Islam and Krishna C. Saraswat, "Metal/Insulator/Semiconductor Carrier Selective Contacts for Photovoltaic Cells," 40th IEEE Photovoltaic Specialists Conference, Denver, June 8-13, 2014.
    241. Max M. Shulaker, K. C. Saraswat, H.-S. Philip Wong, S. Mitra, "Monolithic Three-Dimensional Integration of Carbon Nanotube FETs with Silicon CMOS," Symp. VLSI Technology, June 2014.

    242. D. S. Sukhdeo, D. Nam, J.-H. Kang, J. Petykiewicz, J.-H. Lee,W. S. Jung, J. Vuckovic, M. Brongersma, and K. C. Saraswat,"  Mimicking Heterostructure Behavior Within a Single Material at Room Temperature Using Strain," Conference on Lasers and Electro-Optics (CLEO), San Jose, CA, June, 2014




      243. 2013
    243. Robert Chen, S. Gupta, Y.-C. Huang, Y. Huo, C. W. Rudy, E. Sanchez, Y. Kim, T. I. Kamins, R. L. Byer, K. C. Saraswat, J. S. Harris, "Demonstration of a Ge/GeSn/Ge Double-Heterostructure Microdisk Resonator on Silicon: Enabling high-quality Ge(Sn)-based micro and nanophotonics for lasers, "Nano Letters, 14, pp. 37 - 43, 2013.
    244. Suyog Gupta, B. Magyari-Kope, Y. Nishi and K.C. Saraswat, "Achieving direct band gap in germanium through integration of Sn alloying and external strain," J Appl. Phys., 113, 073707 (2013).
    245. Robert Chen, Y.-C. Huang, S. Gupta, A. C. Lin, E. Sanchez, Y. Kim, K. C. Saraswat, T. I. Kamins and J. S. Harris, "Material characterization of high Sn-content, compressively-strained GeSn epitaxial films after rapid thermal processing, " J. Crystal Growth, 365 (2013) 29-34.
    246. Ashish Pal, K. C. Saraswat, A. Nainani, Z. Ye, X. Bao and E. Sanchez, "GaP Source-Drain Vertical Transistor on Bulk Silicon for 1-Transistor DRAM Application," IEEE International Memory Workshop, Monterey, California, May 2013.
    247. Ze Yuan, A. Kumar, C.-Y. Chen, A. Nainani1 , P. Griffin, A. Wang , W. Wang, M. H. Wong,R. Droopad, R. Contreras-Guerrero, P. Kirsch, R. Jammy, J. Plummer and K. C. Saraswat, "Variability of III-V FinFETs and Hetero-Integration of III-V-OI using Rapid Melt Growth," VLSI Tech. Symp. Tech. Digest, Paper #5-3, Kyoto, June 2013.
    248. Ze Yuan, A. Kumar, C.-Y. Chen, A. Kumar, B. R. Bennett, J. B. Boos and K. C. Saraswat, "Effects of Oxidant Dosing on GaSb (100) prior to ALD and Antimonide-based PMOSFETs with Ni-alloy S/D," IEEE 60th Annual Device Research Conf. (DRC) Digest, Paper IIA-8, Notre Dame, IN, June 2013.
    249. J.-Y. J. Lin, S. Gupta, Y.-C. Huang, Y. Kim, M. Jin, E. Sanchez, R. Chen, K. Balram, D. Miller, J. Harris and K. Saraswat, "Fabrication of GeSn-On-Insulator (GSOI) to Enable Monolithic 3D Co-Integration of Logic and Photonics," VLSI Tech. Symp. Tech. Digest, Paper #3-4, Kyoto, June 2013.
    250. Suyog Gupta, Y.-C. Huang, Y. Kim, E. Sanchez, and K. C. Saraswat,"Hole Mobility Enhancement in Compressively Strained Ge0.93Sn0.07 pMOSFETs, " IEEE Electron Dev. Lett., Vol. 34, No. 7, July 2013, pp. 831 "ì 833.
    251. Ashish Pal, A. Nainani, Z. Ye, Xinyu Bao, E. Sanchez and K. C. Saraswat,"Electrical Characterization of GaP-Silicon Interface for Memory and Transistor Applications," IEEE Trans. Electron Dev., Vol. 60, No. 7, July 2013, pp. 2238 "ì 2245.
    252. Donguk Nam, D. S. Sukhdeo, J.-H. Kang, J. Petykiewicz, J. H. Lee, W. S. Jung, J.Vuck?ovic,? M.Brongersma andK. C.Saraswat, "√∫Strain-Induced Pseudo-Heterostructure Nanowires Confining 2 Carriers at Room Temperature with Nanoscale-Tunable Band Profiles,"√π Nano Letters, DOI: 10.1021/nl401042n, June 11, 2013.
    253. Suyog Gupta, R. Chen, Y.-C. Huang, Y. Kim, E. Sanchez, J. S. Harris and K. C. Saraswat," Highly selective dry etching of germanium over germanium-tin (GeSn) alloys: A novel route for GeSn nanostructure fabrication, ,"√π Nano Letters, DOI: 10.1021/nl4017286, July 8, 2013.
    254. J. Shim, J.-H. Shin, I.-Y. Lee, D. Choi, J. W. Baek, J. Heo, W. Park, J. W. Leem, J. S. Yu, W.-S. Jung, K. Saraswat, and Jin-Hong Park, "Effects of point defect healing on phosphorus implanted germanium n+/p junction and its thermal stability," J. Appl. Phys. 114, 094515 (2013)
    255. Gautam Shine and Krishna C. Saraswat, "Limits of Specific Contact Resistivity to Si, Ge and III-V Semiconductors Using Interfacial Layers," IEEE Int. Conf. on Simulation of Semiconductor Processes and Devices (SISPAD), Glasgo, UK, Sept. 2013.
    256. Ju Hyung Nam, W.S. Jung, J. Shim, T. Ito, Y. Nishi, J-H. Park and K.C. Saraswat, "Germanium on Insulator (GOI) Structure Locally Grown on Silicon Using Hetero Epitaxial Lateral Overgrowth," IEEE 2013 SOI-3DI Conf., Paper # 7.9, Monterey, CA, Oct. 2013.
    257. Ashish Pal, A. Nainani, Z. Ye, X. Bao, E. Sanchez and K.C. Saraswat, "GaP Source-Drain SOI 1T-DRAM: Solving the Key Technological Challenges,"√π IEEE 2013 SOI-3DI Conf., paper # 8a.3, Monterey, CA, Oct. 2013.
    258. Suyog Gupta, V. Moroz, L. Smith, Q. Lu and K. C. Saraswat, ``A Group IV Solution for 7nm FinFET CMOS: Stress Engineering Using Si, Ge and Sn,"√π IEEE IEDM, Washington DC, Paper # 26.3, Dec. 2013.
    259. Suyog Gupta, R. Chen , J. S. Harris and K. C. Saraswat, `` Atomic layer deposition of Al2O3 on germanium-tin (GeSn) and impact of wet chemical surface pre-treatment," Appl. Phys. Lett. 103, 241601 (2013).
    260. Ze Yuan, A. Kumar, C.-Y. Chen, A. Nainani, B. R. Bennett, J. B. Boos, and K. C. Saraswat, "Antimonide-based Heterostructure p-channel MOSFETs with Ni-alloy Source/Drain," IEEE Elec. Dev. Lett. Vol. 34, No. 11, November 2013, pp. 1367-1369.
    261. D. S. Sukhdeo, D. Nam, J.-hyung Kang, J. Petykiewicz, J. H. Lee, W. S. Jung, J. Vu, M. L. Brongersma, and K. C. Saraswat, "Direct Bandgap Germanium Nanowires Inferred from 5.0% Uniaxial Tensile Strain," in 2013 IEEE 10th International Conference on Group IV Photonics (GFP) (2013), Vol. 4, pp. 73-74.
    262. D. Sukhdeo, D. Nam, and Z. Yuan, "Toward an Efficient Germanium-on-Silicon Laser: Ultimate Limits of Tensile Strain and n-Type Doping," CLEO, JTh2A.109 (2013).
    263. D. S. Sukhdeo, H. Lin, D. Nam, Z. Yuan, B. M. Vulovic, S. Gupta, J. S. Harris, B. Dutt, and K. C. Saraswat, "Approaches for a viable Germanium laser: Tensile strain, GeSn alloys, and n-type doping," 2013 Optical Interconnects Conference 5, 112-113 (2013).

      2012
    264. Ashish Pal, A. Nainani, S. Gupta and K. C. Saraswat, ``Performance Improvement of 1-Transistor DRAM by Band Engineering,"√π IEEE Electron Dev. Lett, Vol. 33, No. 1, pp. 29-31, Jan. 2012.
    265. Donguk Nam, D. S. Sukhdeo, S.-L. Cheng, A. Roy, K. C.-Yao Huang, M. Brongersma, Y. Nishi, and K. Saraswat, ``Electroluminescence from strained germanium membranes and implications for an efficient Si-compatible laser,"√π Appl. Phys. Lett. 100, 131112 (2012).
    266. Hyun-Yong Yu, J.-H. Park, A. K. Okyay, and K. C. Saraswat, ``Selective-Area High-Quality Germanium Growth for Monolithic Integrated Optoelectronics,"√π IEEE Electron Dev. Lett, Vol. 33, No. 4, pp. 579-581, Apr. 2012.
    267. Ju-Hyung Nam, T. Fuse, Y. Nishi, and K. C. Saraswat, ``Ge on Insulator (GOI) Structure Using Ge Lateral Overgrowth,"√π 221st ECS Meeting, Abs # 781, May 9, 2012, Seattle.
    268. Ze Yuan, A. Nainani, A. Kumar, X. Guan, B. R. Bennett, J. B. Boos, M. G. Ancona and K. C. Saraswat, ``InGaSb: single channel solution for realizing III-V CMOS,"√π VLSI Tech. Symp., Hawaii, June 2012.
    269. S. Gupta, B. Vincent, D. Lin, M. Gunji, A. Firrincieli, F. Gencarelli, B. Magyari-Kope, B. Yang, B. Douhard, J. Delmotte, A. Franquet, M. Caymax, J. Dekoster, Y. Nishi, K. Saraswat," GeSn Channel nMOSFETs: Material Potential and Technological Outlook,"√π VLSI Tech Symp., Honolulu, June 2012.
    270. Arunanshu M. Roy, J. Y. Jason Lin and K. C. Saraswat, ``The Effect of Fixed Charge in Tunnel-Barrier Contacts for Fermi-Level Depinning in Germanium,'' IEEE Electron Dev. Lett., Vol. 33, No. 6, June 2012, pp. 761-763.
    271. D. Sukhdeo, D. Nam, S.-L. Cheng, Ze Yuan1, A. Roy, K. C.-Y. Huang, M. Brongersma, Y. Nishi and K. C. Saraswat, ``Highly-Strained Germanium as a Gain Medium for Silicon-Compatible Lasers,'' in CLEO: Science and Innovations, OSA Technical Digest (online) (Optical Society of America, 2012), paper CTh3D.6.
    272. Woo Shik Jung, J. H. Nam, J-Y. Lin, S. Ryu, A. Nainani, and K. C. Saraswat, "Enhancement of Phosphorus Dopant Activation and Diffusion of Suppression by Fluorine Co-implant in Epitaxially grown in Germanium,'' Int. Si-Ge Tech. & Dev. Meet. (ISTDM), Berkeley, CA, June 2012, pp. 16-17.
    273. Bin Yang, J.-Y. Jason Lin, S. Gupta, A. Roy, S. Lianga, W. Maszara, Y. Nishi, and K. C. Saraswat, "Low-contact-resistivity Nickel Germanide Contacts on n+Ge with Phosphorus/Antimony Co-doping and Schottky Barrier Height Lowering,'' Int. Si-Ge Tech. and Dev. Meet. (ISTDM), Berkeley, CA, June 2012, pp. 88-89.
    274. J-Y. Jason Lin, A. Roy, Y. Sun, and K. C. Saraswat, "Metal-Insulator-Semiconductor Contacts on Ge: Physics and Applications," Int. Si-Ge Tech. and Dev. Meet. (ISTDM), Berkeley, CA, June 2012, pp. 90-91.
    275. Donguk Nam, D. Sukhdeo, S.-L. Cheng, K. C.-Y. Huang, M. Brongersma, Y. Nishi, and K. C. Saraswat, "Demonstration of Electroluminescence from Strained Ge Membrane LED," Int. Si-Ge Tech. & Dev. Meet. (ISTDM), Berkeley, CA, June 2012, pp.98-99.
    276. Ze Yuan, A. Nainani, B. R. Bennett, B. J. Boos, M. G.Ancona, and K. C. Saraswat, "Amelioration of interface state response using band engineering in III-V quantum well metal-oxide-semiconductor field-effect transistors," Applied Physics Letters , vol.100, no.14, p.143503, Apr 2012.
    277. D. Giubertoni, E. Demenev, S. Gupta, Y. Jestin, F. Meirer, S. Gennaro, E. Iacob, G. Pepponi, G. Pucker, R. M. Gwilliam, C. Jeynes, J. L. Colaux, K. C. Saraswat and M. Bersani, "Solid Phase Epitaxial Re-Growth Of Sn Ion Implanted Germanium Thin Films," AIP Conf. Proc. 1496, 103 (2012).
    278. Aneesh Nainani, T. Irisawa, Z. Yuan, B. R. Bennett, and J. B. Boos, Y. Nishi and K. C. Saraswat, "Optimization of the Al2O3/GaSb Interface and a High-Mobility GaSb pMOSFET, J. of Appl. Phys, Volume 111, Issue 10, p.103706, (2012).
    279. B. Dutt, D. S. Sukhdeo, D. Nam, B. M. Vulovic, Z. Yuan, K. C. Saraswat, ``Roadmap to an Efficient Germanium-on-Silicon Laser: Strain vs. n-Type Doping," IEEE Photonics Journal, Vol. 4, No. 5, pp. 2002 - 2009, Oct. 2012.
    280. J-Y. Jason Lin, A. Roy, and K. C. Saraswat, "Reduction in Specific Contact Resistivity to n+ Ge using TiO2 Interfacial Layer," IEEE Electron Dev. Lett., Vol. 33, No. 11, November 2012, pp. 1541 - 1543.
    281. Woo-Shik Jung, J.-H. Park, J.-Y. Jason Lin, S. Wong, . IEEE, and K. C. Saraswat, "Characterization of Geometric Leakage Current of GeO2 isolation and Effect of Forming Gas Annealing in Germanium p-n Junctions,'' IEEE Electron Dev. Lett., Vol. 33, No. 11, November 2012, pp. 1520-1522.
    282. Bin Yang, S. Gupta, J. P. McVittie, Y. Nishi, S. Liang, W.P. Mazsra, K. C. Saraswat, "High Quality Germanium Gate Stack by Sulfur Passivation and Novel Ozone Oxidation," IEEE SISC, Dec. 2012.
    283. D. Lin, Alian, A. Gupta, S. Yang, B. Bury, E. Sioncke, S. Degraeve, R. Toledano Luque, M. Krom, R. Favia, H. P. Bender, M. Caymax, K. Saraswat, N. Collaert, and A. Thean, "Beyond interface: the impact of oxide border traps on InGaAs and Ge n-MOSFETs," Tech Abstracts IEEE IEDM, December 2012 San Francisco, pp. 28.3.1 - 28.3.4.
    284. Suyog Gupta, B. Vincent, B. Yang, H. C. Lin, F. Gencarelli, J.-Y. J. Lin, R. Chen, O. Richard, H. Bender, B. Magyari-Kope, M. Caymax, J. Dekoster, Y. Nishi and K.C. Saraswat, "Towards High Mobility GeSn Channel nMOSFETs: Improved Surface Passivation using Novel Ozone Oxidation Method," Tech Abstracts IEEE IEDM, Dec. 2012 San Francisco, pp. 16.2.1-16.2.4.
    285. Woo-Shik Jung, J.-H. Park, A. Nainani, D. Nam, and K. C. Saraswat, "Fluorine Passivation of Vacancy Defects in Bulk Germanium for Ge Metal-Oxide-Semiconductor Field-Effect Transistor Applicatios," Appl. Phys. Lett., Volume 101, Number 7, p.072104, (2012).

      2011
    286. Duygu Kuzum, T. Krishnamohan, A. Nainani, Y. Sun, P. A. Pianetta, H.-S. Philip Wong and K. C. Saraswat,``High Mobility Ge N-MOSFETs and Mobility Degradation Mechanisms," IEEE Trans. Electron Dev. Vol. 58, No. 1, Jan. 2011, pp. 59-66.
    287. Eun Ji Kim, M. Shandalov, K, C. Saraswat and P. C. McIntyre, "Inelastic electron tunneling study of crystallization effects and defect energies in hafnium oxide gate dielectrics," Appl. Phys. Lett. 98, 032108, 2011.
    288. Masaharu Kobabyashi, J Mitard, T. Irisawa, T. Y. Hoffmann, M. Meuris, K. C. Saraswat, Y. Nishi and M. Heyns, "On the High Field-Transport and Uniaxial Stress in Ge PFETs," IEEE Trans. Electron Dev. Vol. 58, No. 2, Feb. 2011, pp. 384-391.
    289. Jenny Hu, K. C. Saraswat, and H.-S. P. Wong, ``Novel contact structures for high mobility channel materials,"MRS Bulletin, Volume 36, pp. 112-119, February 2011.
    290. Jenny Hu, K. C. Saraswat, and H.-S. P. Wong, ``Experimental demonstration of In0.53Ga0.47 As field effect transistorswith scalable nonalloyed source/drain contacts,'' Appl. Phys. Lett., 98, 062107 (2011)
    291. Jin-Hong Park, D. Kuzum, W.-S. Jung, and K. C. Saraswat ,``N-channel germanium MOSFET fabricated at below 360/deg/C by cobalt-induced dopant activation for monolithic 3D-ICs," IEEE Electron Dev. Lett., Vol. 32, No. 3, pp. 234-236, March 2011.
    292. Duygu Kuzum, J.-H. Park, T. Krishnamohan, H.-S. Philip Wong and K. C. Saraswat,``The Effect of Donor/Acceptor Nature of Interface Traps on Ge MOSFET Characteristics," IEEE Trans. Electron Dev., Vol. 32, No. 4, pp. 1015-1022, April 2011.
    293. Hyun-Yong Yu, M. Kobayashi, J.-H. Park, Y. Nishi and K. C. Saraswat ,``Novel Germanium n-MOSFETs With Raised Source/Drain on Selectively Grown Ge on Si for Monolithic Integration," IEEE Electron Dev. Lett., Vol. 32, No. 4, pp. 446-448, April 2011.
    294. Gaurav Thareja, S. Cheng, T. I. Kamins, K. C. Saraswat, and Y. Nishi, `` Junctions Obtained Using Rapid Thermal Annealing of Co-implantated P and Sb," IEEE Electron Dev. Lett., 2009. Vol. 32, No. 5, pp. 608-610, May 2011.
    295. Aneesh Nainani, Y. Sun, T. Irisawa, Z. Yuan, M. Kobayashi, P. Pianetta, Y. Nishi, K. C. Saraswat, B. R. Bennett, J. B. Boos and M. G. Ancona , ``Device quality Sb-based compound semiconductor surface: A comparative study of chemical cleaning," Journal of Applied Physics , vol.109, no.11, p.114908, Jun 2011.
    296. Z. Yuan, A. Nainani, J.-Y. Lin, B. R. Bennett, J.B. Boos, M. G. Ancona and K. C. Saraswat, ``Fermi-level pinning at metal/GaSb interface and demonstration of InxGa1-xSb channel Schottky pMOSFETs with metal S/D," IEEE Dev. Res. Conf., Santa Barbara, June 2011.
    297. Gaurav Thareja, S. Chopra, B. Adams, N. Patil, S. Moffatt, R. Brennan, G. Goodman, K. Saraswat, and Y. Nishi, ``High n-type Antimony Dopant Activation in Germanium Using Laser Annealing for n+/p Junction Diode," IEEE Electron Dev. Lett., Vol. 32, No. 7, pp. 838 - 840, July 2011.
    298. Jin-Hong Park, D. Kuzum, H.-Y. Yu, and K. C. Saraswat ,`` Optimization of Germanium (Ge) n+/p and p+/n Junction Diodes and Sub 380ºC Ge CMOS Technology for Monolithic Three-Dimensional Integration," IEEE Trans. Electron Dev., Vol. 58, No. 8, pp. 2394-2400, August 2011.
    299. J.-Y. Jason Lin, A. M. Roy, A. Nainani, Y. Sun and K. C. Saraswat ,``Increase in current density for metal contacts to n-germanium by inserting TiO2 interfacial layer to reduce Schottky barrier height," Appl. Phys. Lett., 98, 092113 (2011)
    300. Jenny Hu, K. C. Saraswat, and H.-S. P. Wong, ``Metal/III-V effective barrier height tuning using atomic layer deposition of high-k/high-k bilayer interfaces,'' Appl. Phys. Lett., 99, 092107 (2011).
    301. Ze Yuan, A. Nainani, X. Guan, H. -S. P. Wong and K. C. Saraswat, ``Tight-binding Study of Bandstructure Engineering for Ballistic III-V nMOSFETs," IEEE SISPAD, Osaka, Japan, Sept. 2011.
    302. Ximeng Guan, D. Kim, K. C. Saraswat and H.-S. P. Wong, ``Analytical Approximation of Complex Band Structures for Band-to-Band Tunneling Models, " IEEE SISPAD, Osaka, Japan, Sept. 2011.
    303. Ximeng Guan, D. Kim, K. C. Saraswat and H.-S. P. Wong, `` Complex Band Structures From Parabolic to Elliptic Approximation, " IEEE Electron Dev. Lett., Vol. 32, No. 9, pp. 1296 - 1298, Sept. 2011.
    304. Arunanshu M. Roy, D. E. Nikonov and K. C. Saraswat, ``Simulation of spin MOSFETs, "Proc. SPIE Vol. 8100, Spintronics IV, San Diego, CA, August 2011.
    305. Ximeng Guan, D. Kim, K. C. Saraswat and H.-S. P. Wong, ``Analytical Approximation of Complex Band Structures for Band-to-Band Tunneling Models, IEEE SISPAD, Osaka, Japan, Sept. 2011.
    306. Arunanshu M. Roy, D. E. Nikonov and K. C. Saraswat, ``Electric Field Effects in Semiconductor Spin Transport - A Transfer Matrix Formalism," IEEE Trans. Magnetics, Vol. 47, No. 10, pp. 2746 - 2749, Oct. 2011
    307. Aneesh Nainani, T. Irisawa, Z. Yuan, B. R. Bennett, J. B. Boos, Y. Nishi and K. C. Saraswat, "Optimization of Al2O3/GaSb interface and a high mobility GaSb p-MOSFET," IEEE Trans. Electron Dev., Vol. 58, No. 10, pp. 3407-3415, Oct. 2011.
    308. Donguk Nam, D. S. Sukhdeo, A. Roy, K. C. Balram, S.-L. Cheng, K. C.-Yao Huang, Z. Yuan, M. Brongersma, Y. Nishi, D. A.B. Miller, and K. Saraswat, ``Strained Germanium Thin Film Membrane on Silicon Substrate for Optoelectronics," Optics Express, Vol. 19, No. 27, pp. 25866 - 25872, 19 Dec. 2011.
    309. Jenny Hu, A. Nainani, Y. Sun, K. C. Saraswat, and H.-S. P. Wong, ``Impact of fixed charge on metal-insulator-semiconductor barrier height reduction, ``Appl. Phys. Lett. 99, 252104, Dec. 2011.
    310. Suyog Gupta, R. Chen, J. Harris, K. C. Saraswat ``Atomic Layer Deposition of Al2O3 on GeSn and Impact of Wet Chemical Surface Pre-Treatment," IEEE SISC, Paper # 7.5, Arlington, VA, Dec. 2011.
    311. Suyog Gupta, R. Chen, B. M. Kope, H. Lin, Y. Nishi, J. Harris and K. C. Saraswat, ``GeSn technology: Extending the Ge electronics roadmap," IEEE IEDM, Washington DC, Paper # 16.6, Dec. 2011.
    312. Ze Yuan, A. Nainani, B. R. Bennett, B. J. Boos, M. G.Ancona, and K. C. Saraswat, "Heterostructure design and demonstration of InGaSb channel III-V CMOS transistors," Semiconductor Device Research Symposium (ISDRS), 2011 International , pp.1-2, 7-9 Dec. 2011.
    313. Ze Yuan, A. Nainani, Y. Sun, J-Y. Lin, P. Pianetta and K. C. Saraswat, ``Increase in current density and effective Schottky barrier height reduction for metal contact to n-type GaSb using interfacial layer of TiO2," Appl. Phys. Lett. 98, 172106 (2011).
    314. Szu-Lin Cheng, G. Shambat, J. Lu, H.-Y. Yu, K. C. Saraswat, T. I. Kamins, Y. Nishi and J. Vuckovic, "Cavity-enhanced direct band electroluminescence near 1550nm from germanium microdisk resonator diode on silicon," Appl. Phys. Lett., 98, 211101 (2011).
    315. Duygu Kuzum, J.-H. Park, T. Krishnamohan and K. C. Saraswat, "Effect of interfacial oxide on Ge MOSCAP and N-MOSFET characteristics," Microelectronic Engineering, 88 (2011) 3428 - 3431.
    316. Aneesh Nainani, T. Irisawa, B. R. Bennett, and J. B. Boos, M. G. Ancona and K. C. Saraswat, "Study of Shubnikov-de Haas oscillations and measurement of hole effective mass in compressively strained InGaSb quantum wells," Solid-State Electronics, 62, 138-141(2011).
    317. Aneesh Nainani, Z. Yuan, T. Krishnamohan, Y. Nishi, K. C. Saraswat, B. R. Bennett, J. B. Boos and M. Reason, M. G. Ancona,"InGaSb channel p-metal-oxide-semiconductor field effect transistors: Effect of strain and heterostructure design" J Appl. Phys., Volume 110, Issue 1, p. 014503, (2011).
    318. Yeul Na, D. Ly-Gagnon, D. A. Miller, and K. C. Saraswat, "A Novel Optoelectronic Device Complimentary to Photodetector," Optical Fiber Communication Conference, Los Angeles, CA, March 2011

      2010
    319. Donkoun Lee, S. Raghunathan, R. J. Wilson, D. E. Nikonov, K. Saraswat, and S. X. Wang, "The influence of Fermi level pinning/depinning on the Schottky barrier height and contact resistance in Ge/CoFeB and Ge/MgO/CoFeB structures," Appl. Phys. Lett. 96, 052514 (2010).
    320. Shin-ichi Kobayashi, Y. Nishi and K. C. Saraswat, "Effect of isochronal hydrogen annealing on surface roughness and threading dislocation density of epitaxial Ge films grown on Si," Thin Solid Films, Vol. 518, pp. S136 - S139, January 2010.
    321. Munehiro Tada, J.-H. Park, D. Kuzum, G. Thareja, J. R. Jain, Y. Nishi and K. C. Saraswat, "Low Temperature Germanium Growth on Silicon Oxide Using Boron Seed Layer and In Situ Dopant Activation," Journal of The Electrochemical Society, 157 (3) H371-H376, 2010.
    322. Arunanshu M. Roy, D. E. Nikonov and K. C. Saraswat, "Conductivity Mismatch and Voltage Dependence of Magnetoresistance in a Semiconductor Spin Injection Device," J. Appl. Phys. Vol. 107, # 7, p. 064504, March 2010.
    323. Jenny Hu, K. C. Saraswat and H.-S. P. Wong, "Metal/III-V Schottky barrier height tuning for the design of non alloyed III-V ?eld-effect transistor source/drain contacts," J. Appl. Phys. Vol. 107, # 7, p. 063712, March 2010.
    324. M. Günhan Ertosun and K. C. Saraswat, "Investigation of Capacitorless Double-Gate Single-Transistor DRAM: With and Without Quantum Well," IEEE Trans. Electron Dev. Vol.57, No. 3, pp. 608-613, March 2010.
    325. Masaharu Kobayashi, T. Irisawa, B. M. Kope, K. Saraswat, H.-S. Philip Wong and Y. Nishi, "Uniaxial Stress Engineering for High Performance Ge NMOSFETs," IEEE Trans. Electron Dev. Vol.57, No. 5, pp. 1037-1046, May 2010.
    326. M. Günhan Ertosun, K.-Y. Lim, C. Park, J. Oh, P. Kirsch and K. C. Saraswat, "Novel Capacitorless Single Transistor Charge Trap DRAM (1T CT DRAM) Utilizing Electrons," IEEE Electron Dev. Lett., Vol. 31, No. 5, May 2009, pp. 405-407.
    327. Aneesh Nainani, J. Yum, J. Barnett, R. Hill, N. Goel, J. Huang, P. Majhi, R. Jammy, and K. C. Saraswat, "Study of piezoresistance under unixial stress for technologically relevant III-V semiconductors using wafer bending experiments," Appl. Phys. Lett., Vol.96, Issue 24, 242110, 17 June 2010.
    328. Masaharu Kobayashi, A. Kinoshita, K. Saraswat, H.-S. Philip Wong and Y. Nishi, "Fermi Level Depinning in Metal/Ge Schottky Junction for Metal Source/Drain Ge Metal-Oxide-Semiconductor Field-Effect-Transistors Application," J. Appl. Phys. 105, 023702 (2009).
    329. Masaharu Kobabyashi, J Mitard1, T. Irisawa, T. Y. Hoffmann, M. Meuris, K. C. Saraswat, Y. Nishi and M. Heyns, "Experimental Demonstration of High Source Velocity and Its Enhancement by Uniaxial Stress in Ge PFETs," 2010 VLSI Tech. Symp., pp. 215-216, Hawaii, June 2010.
    330. Hyun-Yong Yu, S. Cheng, J.-H. Park, A. K. Okyay, M. Cengiz Onba?li, B. Ercan, Y. Nishi, and K. C. Saraswat, "High quality single-crystal germanium-on-insulator on bulk Si substrates based on multistep lateral over-growth with hydrogen annealing," Appl. Phys. Lett. 97, 063503 (August 2010)
    331. Aneesh Nainani, T. Irisawa, Y. Sun, F. Crnogorac, K. Saraswat, ``A sub 350ºC Self Aligned GaSb pMOSFET with ALD high-k dielectric," Int. Conf. on Solid State Dev. And Mat. (SSDM), Tokyo, Sept. 2010.
    332. W. Jung, J. Park, D. Kuzum, W. Kim, S. Wong, and K. C. Saraswat, ``Leakage Current Analysis of Lateral p+/n Ge Based Diode Activated at Low Temperature for Three-Dimensional Integrated Circuit (3D-ICs) ,'' 218th Electrochem. Soc. Meet., Abs. No. 1674, Las Vegas, October 10 - 15, 2010
    333. S. Raghunathan, T. Krishnamohan, and K. C. Saraswat, ``Novel SiGe Source/Drain for Reduced Parasitic Resistance in Ge NMOS,'' ECS Transactions, Vol. 33, No. 6, pp. 871-876, 2010. Also presented at 218th Electrochem. Soc. Meet., Abs. No. 1944, Las Vegas, October 10 - 15, 2010.
    334. Arunanshu M. Roy, J. Y. Jason Lin and K. C. Saraswat, ``Specific Contact Resistivity of Tunnel Barrier Contacts used for Fermi Level Depinning,'' IEEE Electron Dev. Lett., Vol. 31, No. 9, October 2010, pp. 1077-1079.
    335. Jenny Hu, K. C. Saraswat, and H.-S. P. Wong, ``Metal/III-V Schottky barrier height tuning for the design of nonalloyed III-V ?eld-effect transistor source/drain contacts,'' J. Appl. Phys., 107, 063712 (2010)
    336. Aneesh Nainani, T. Irisawa, Z. Yuan, Y.Sun, T. Krishnamohan, M. Reason, B.R. Bennett, J. B. Boos, M. Ancona, Y. Nishi, K. C. Saraswat, "Development of High-k Dielectric for Antimonides and a Sub 350ºC III-V pMOSFET Outperforming Germanium," IEEE Int. Electron Dev. Meet. (IEDM) Technical Digest, pp. 6.4.1-6.4.4, San Francisco, Dec. 2010.
    337. Gaurav Thareja, J. Liang, S. Chopra, B. Adams, N. Patil, S.-L. Cheng, A. Nainani, E. Tasyurek, Y. Kim, S. Moffatt, R. Brennan, J. McVittie, T. Kamins, K. Saraswat, Y. Nishi, "High Performance Germanium N-MOSFET with Antimony Dopant Activation Beyond 1x1020 cm-3," IEEE Int. Electron Dev. Meet. (IEDM) Technical Digest, pp. 10.5.1-10.5.4, San Francisco, Dec. 2010.

      2009
    338. M. Tada, J.-H. Park, J. R. Jain, and K. C. Saraswat, " Low-Temperature,Low Pressure ChemicalVapor Deposition and Solid Phase Crystallization of Silicon/Germanium Films," J. Electrochem. Soc., 156, (1) D23-D27, 2009.
    339. Shin-ichi. Kobayashi, Y. Nishi and K. C. Saraswat, "Effect of Isochronal Hydrogen Annealing on Surface Roughness and Threading Dislocation Density of Epitaxial Ge on Si, " Int. Conf. on Silicon Epitaxy and Heterostructures (ICSI-6), Los Angels, May 2009.
    340. Jin-Hong Park, M. Tada, K. Yoo, W.-S. Jung, H. -S. P. Wong, and K. C. Saraswat, "Metal-Induced Dopants Activation (MIDA) on Amorphous Germanium for Monolithic 3D-ICs," MRS 2009 Spring Meeting, Symposium on Materials and Processes for Advanced Interconnects for Microelectronics, Paper D8.9, San Francisco, CA, Apr 13-17, 2009.
    341. Eunji Kim, G. Thareja, K. C. Saraswat, P. C. McIntyre and Y. Nishi, "Correlation between Inelastic Electron Tunneling Spectroscopy and electrical measurements of ultra-thin high density Plasma gate oxides for MOS devices," MRS Abstract 1 IETS April 2009, San Francisco.
    342. Munehiro Tada, Jin-Hong Park, D. Kuzum, G. Thareja, Y. Nishi, K. C. Saraswat, "Fully Low Temperature (350oC) Processed Si PMOSFET with Poly-Ge Gate, Radical Oxidation of Gate-Oxide and Schottky Source/Drain for Monolithic 3D-ICs," MRS 2009 Spring Meeting, Symposium on Materials and Processes for Advanced Interconnects for Microelectronics, San Francisco, CA, Apr 13-17, 2009.
    343. M. Tada, J.-H. Park, J. R. Jain, and K. C. Saraswat, " Low-Temperature,Low Pressure ChemicalVapor Deposition and Solid Phase Crystallization of Silicon-Germanium Films," J. Electrochem. Soc., 156, (1) D23-D27, 2009.
    344. S. Verma, G. Bersuker, D. C. Gilmer, A. Padovani, H. Park, A. Nainani, D. Heh, J. Huang, J. Jiang, K. Parat, P. D. Kirsch, L. Larcher, H.-H. Tseng, K. C. Saraswat, R. Jammy, " A Novel Fluorine Incorporated Band Engineered (BE) Tunnel (SiO2/ HfSiO/ SiO2) TANOS with excellent Program/Erase and Endurance to 105 cycles", IMW`09 Monterey, CA, 2009.
    345. Hyun-Yong Yu, M. Ishibashi, J.-H. Park, M. Kobayashi, and K. C. Saraswat, "p-Channel Ge MOSFET by Selectively Heteroepitaxially Grown Ge on Si," IEEE Electron Dev. Lett., Vol. 30, No. 6, June 2009, pp. 675-677.
    346. Shin-ichi Kobayashi, Y. Nishi and K. C. Saraswat, "Effect of Isochronal Hydrogen Annealing on Surface Roughness and Threading Dislocation Density of Epitaxial Ge on Si," Presented at the 6th Int. Conf. on Silicon Epitaxy and Heterostructures, Hawthorne, CA. May 17 - 22, 2009
    347. Szu-Lin Cheng, J. Lu, G. Shambat, H.-Y. Yu, K. C. Saraswat, J. Vuckovic, and Y. Nishi, "Room temperature 1.6 um electroluminescence from Ge light emitting diode on Si substrate," Optics Express, Vol. 17, No. 12, pp. 1001 - 10024, 8 June 2009
    348. Masaharu Kobayashi, T. Irisawa, B. M. Kope, Y. Sun, K. Saraswat, H. -S. Philip Wong, P. Pianetta and Yoshio Nishi, "Mobility Enhancement by Uniaxial Stress in (100) Ge NMOSFET with Interfacial Gate Dielectric GeO2 Grown by SPA Radical Oxidation, " VLSI Tech. Symp., Kyoto, June 2009.
    349. Sarves Verma, G. Bersuker, D.C.Gilmer, A. Padovani, H. Park, A.Nainani, J. Huang, K. Parat, P. D. Kirsch, L. archer, H.-H.Tseng, K. C.Saraswat and R. Jammy, "Understanding Endurance Degradation in Flash Memory through Transconductance Measurement, "6th International Symposium on Advanced Gate Stack Technology, San Francisco, August 23-26, 2009.
    350. Duygu Kuzum, Jin-Hong Park, T. Krishnamohan, and K. C. Saraswat, "Effect of Interfacial Oxide on Ge MOSCAP Characteristics, "6th International Symposium on Advanced Gate Stack Technology, San Francisco, August 23-26, 2009.
    351. David C. Gilmer, N. Goel, S. Verma, H. Park, C. Park, G. Bersuker, P. D. Kirsch, R. Jammy & K. C. Saraswat, " Band Engineered Tunnel Oxides for Improved TANOS-type Flash Program/Erase with Good Retention and 100K Cycle Endurance", IEEE VLSI Tech. Systems & Appls. (VLSI-TSA), Hsinchu, Taiwan, 2009.
    352. Hyun-Yong Yu, S.-L. Cheng, P. B. Griffin, Y. Nishi, and K. C. Saraswat, " Germanium In Situ Doped Epitaxial Growth on Si for High-Performance n+/p Junction Diode," IEEE Electron Dev. Lett., Vol. 30, No. 9, Sept. 2009, pp. 1002-1005.
    353. Jin-Hong Park, M. Tada, W.-S. Jung, H.-S. P. Wong, and K. C. Saraswat, "Metal-induced dopants (boron and phosphorus) activation process in amorphous germanium for monolithic three-dimensional integration," J. Appl. Phys. Vol.106, Issue 7, Oct 2009.
    354. Hyun-Yong Yu, S. Ren, W. S. Jung, A. K. Okyay, D. A. B. Miller and K. C. Saraswat, " High-Efficiency p-i-n Photodetectors on Selective-Area-Grown Ge for Monolithic Integration," IEEE Electron Dev. Lett., Vol. 30, No. 11, Nov. 2009, pp.1161-1163.
    355. Masaharu Kobayashi, G. Thareja, M. Ishibashi, Y. Sun, P. Griffin, J. McVittie, P Pianetta, K. Saraswat and Y. Nishi, "Radical oxidation of germanium for interface gate dielectric GeO2 formation in metal-insulator-semiconductor gate stack," J. Appl. Phys., Vol. 106, 104117, (2009)
    356. Aneesh Nainani, D. Kim, T. Krishnamohan and K. C. Saraswat, "Hole Mobility and its enhancement with Strain for technologically relevant III-V semiconductors, "IEEE Int. Conf. on Simulation of Semiconductor Processes and Devices (SISPAD '09), pp. 47-50, September 9-11, 2009 San Diego, Ca.
    357. M. Gunhan Ertosun and K. C. Saraswat, "Characteristics of the Capacitorless Double Gate Quantum Well Single Transistor DRAM 1T-QW DRAM, " IEEE Int. Conf. on Simulation of Semiconductor Processes and Devices (SISPAD '09), pp. 35-38, September 9-11, 2009 San Diego, Ca.
    358. Arunanshu M. Roy, D. E. Nikonov and K. C. Saraswat, "Conductivity Mismatch and Voltage Dependence of Magnetoresistance in a Semiconductor Spin Injection and Detection Structure, " IEEE Int. Conf. on Simulation of Semiconductor Processes and Devices (SISPAD '09), pp. 17-20, September 9-11, 2009 San Diego, Ca.
    359. A. Nainani, M. Kobayashi, D. Witte, T. Irisawa, T. Krishnamohan, K. Saraswat, B. R. Bennett,"Investigation of Strained-Sb Hetrostructures with High Hole Mobility" SSDM, Sendai, Japan, Oct. 2009.
    360. Duygu Kuzum, T. Krishnamohan, A. Nainani, Y. Sun, P. A. Pianetta, H. S-. P. Wong and K. C. Saraswat, "High Mobility Ge NMOS and Its Challenges," Int. Electron Dev. Meet. (IEDM) Technical Digest, pp. 453-456, Baltimore, MD, Dec. 2009.
    361. Shyam Raghunathan, T. Krishnamohan, K. Parat and K. C. Saraswat, "Investigation of Ballistic Current in Scaled Floating-gate NAND FLASH and a solution," Int. Electron Dev. Meet. (IEDM) Technical Digest, pp. 819-822, Baltimore, MD, Dec. 2009.
    362. Hyun-Yong Yu, M. Kobayashi, W. S. Jung, Y. Nishi and K. C. Saraswat, "High Performance n-MOSFETs with Novel Source/Drain on Selectively Grown Ge on Si for Monolithic Integration," Int. Electron Dev. Meet. (IEDM) Technical Digest, pp. 685-688, Baltimore, MD, Dec. 2009.
    363. A. Nainani, S. Raghunathan, D.Witte, M. Kobayashi, T.Irisawa, T.Krishnamohan, K. Saraswat, B.R. Bennett, M. Ancona and J. B. Boos, "Engineering of Strained III-V Heterostructures for High Hole Mobility," Int. Electron Dev. Meet. (IEDM) Technical Digest, pp. 857-860, Baltimore, MD, Dec. 2009.
    364. D. C. Gilmer, N. Goel, H. Park, C. Park, S. Verma, G. Bersuker, P. Lysaght, H.-H. Tseng, P. D. Kirsch, K. C. Saraswat and R. Jammy, "Engineering the Complete MANOS-type NVM Stack for Best in Class Retention Performance," IEEE Int. Electron Dev. Meet. (IEDM) Technical Digest, pp. 439-442, Baltimore, MD, Dec. 2009.
    365. Sarves Verma, D. C. Gilmer, P. Lysaght, J. Price, G. Bersuker, P. D. Kirsch,H. H. Tseng, R. Jammy, K. C. Saraswat "Physical & Electrical Characterization of Fluorine Passivation for Improving Band-Engineered -SiO2/HfSiO/SiO2 (OHO) TANOS Flash Memory" SISC 2009.
    366. H.-Y Yu, S. Ren, M. Kobayashi, D. A. B. Miller, Y. Nishi, K.C.Saraswat, "Effect of uniaxial strain on Ge p-i-n photodiodes integrated on Si," IEEE Lasers and Electro Optics Society Meeting (LEOS 2009), Belek-Antalya, Turkey, TuCC 5, Oct 4 - 8, 2009.
    367. H.-Y. Yu, D. Kim, S. Ren, M. Kobayashi, D. A. B. Miller, Y. Nishi, K.C.Saraswat, "Effect of uniaxial-strain on Ge p-i-n photodiodes integrated on Si," Appl. Phy. Lett. Vol. 95 161106 (2009).
    368. Eun Ji Kim, E. Chagarov, J. Cagnon, Y. Yuan, A. C. Kummel, P. M. Asbeck, S. Stemmer, K. C. Saraswat, and P. C. McIntyre, "Atomically abrupt and unpinned Al2O3/In0.53Ga0.47As interfaces: Experiment and simulation," J. Appl. Phys. 106, 124508 (2009)
    369. Duygu Kuzum, A. J. Pethe, T. Krishnamohan, and K. C. Saraswat, "Ge (100) and (111) N- and P-FETs With High Mobility and Low-T Mobility Characterization" IEEE Trans. Electron Devices 56, 648 (2009)

      2008
    370. Jungyup Kim, J. McVittie, K. Saraswat, and Y. Nishi, ``Passivation studies of germanium surfaces," Solid State Phenomena, " vol. 134, p. 33-6, 2008.
    371. Kyung-Hoae Koo, Hoyeol Cho, Pawan Kapur, and Krishna C. Saraswat,"Performance Comparisons Between Cu/Low-K Carbon-Nanotube, And Optics for Future On-Chip Interconnects," IEEE Electron Dev. Lett., Vol. 29, No. 1, pp. 122-124, January 2008.
    372. K. Martens, C. O. Chui, B. De Jaeger, D. Kuzum, M. Meuris, G. Groeseneken, H. Maes, M. Heyns, T. Krishnamohan, K. Saraswat, ``On the Correct Extraction of Interface Trap Density of MOS Devices with High-Mobility Semiconductor Substrate," IEEE Trans. Electron Dev., Vol. 55, No. 2, pp. 547-556, Feb. 2008.
    373. Hoon Cho, Pwan Kapur, Pranav Kalavade and K. C. Saraswat, ``A Low Power, Highly Scalable, Vertical Double Gate MOSFET Using Novel Processes" IEEE Trans. Electron Dev., Vol. 55, No. 2, pp. 632-639, Feb. 2008.
    374. S. Verma, E. Pop, P. Kapur, K. Parat, and K. C. Saraswat, ``Operational Voltage Reduction of Flash Memory Using High-k Composite Tunnel Barriers," IEEE Electron Dev. Lett., Vol. 29, No. 3, pp. 252-254, March 2008.
    375. Duygu Kuzum, T. Krishnamohan, A. J. Pethe, A. K. Okyay, Y. Oshima, Y. Sun, J. P. McVittie, P. A. Pianetta, P. C. McIntyre, and K.C. Saraswat, ``Ge Interface Engineering with Ozone-oxidation for Low Interface State Density," IEEE Electron Dev. Lett, Vol. 29, No. 4, pp. 328-330, April 2008.
    376. L. Tang, E. Kocabas, S. Latif, A. K. Okyay, D. Ly-Gagnon, K. C. Saraswat, and D. A. B. Miller, "Nanometre-Scale Germanium Photodetector Enhanced by a Near- Infrared Dipole Antenna," Nature Photonics, Vol 2, pp. 226 - 229, April 2008.
    377. A. Behnam, J. Johnson, Y. Choi, L. Noriega, M. Gunhan Ertosun, Z. Wu, A. G. Rinzler, P. Kapur, K. C. Saraswat, and Ant Ural, ``Metal-Semiconductor-Metal photodetectors based on single-walled carbon nanotube film-GaAs Schottky contacts, " J. App. Phys., 103, 114315, 13 June 2008
    378. Eunji Kim, K. C. Saraswat, P. Mcintyre, ``T3, Defect Study of Al/HfO2/Si Gate Stacks by Inelastic Electron Tunneling Spectroscopy."2008 Electronic Materials Conference, Santa Barbara, June 2008.
    379. M. Gunhan Ertosun, H. Cho, P. Kapur, and K. C. Saraswat, ``A Nanoscale Vertical Double-GateSingle-Transistor Capacitorless DRAM," IEEE Electron Dev. Lett., Vol. 29, June 2008 pp. 615 - 617.
    380. Masaharu Kobayashi, A. Kinoshita, K. C. Saraswat, H. -S. P. Wong and Y. Nishi, ``Fermi-Level Depinning in Metal/Ge Schottky Junction and Its Application to Metal Source/Drain Ge NMOSFET," VLSI Tech. Symp., Honolulu, June 2008.
    381. J. Hu, D. Choi, J. S. Harris, K. Saraswat, H.-S. P. Wong, ``Fermi-Level Depinning of GaAs for Ohmic Contacts," IEEE Device Research Conf. Santa Barbara, June 2008
    382. D. Kim, T. Krishnamohan, K. C. Saraswat, ``Performance Evaluation of III-V Double-Gate n-MOSFETs," IEEE Device Research Conf. Santa Barbara, June 2008
    383. Jin-Hong Park, M. Tada, P. Kapur, H. Peng, and K. C. Saraswat, ``Self-nucleation Free and Dimension Dependent Ni and Au-induced Lateral Crystallization of Amorphous Germanium for Single Crystalline Germanium Growth on Insulating Substrate, ``J. Appl. Phys., Vol. 104, 064501, 15 Sep. 2008.
    384. Jin-Hong Park, M. Tada, H. Peng, and K. C. Saraswat, ``Low temperature processes using Ni-induced Crystallization Technique for Monolithic Three Dimensional Integration," Conference on Solid State Devices and Materials-SSDM, Session No: C-2-1, Tsukuba, Japan, Sep 23-26, 2008.
    385. D. Kuzum, T. Krishnamohan, A. Pethe, Y. Oshima, Y. Sun, J. McVittie, P. McIntyre and P. Pianetta and K. C. Saraswat, ``Ge Interface Passivation Techniques and Their Thermal Stability," The Electroch. Soc. Trans., vol. 16 # (10) pp. 1025-1029; 2008, also presented at the 214th ECS Meeting, Honolulu, October 2008.
    386. D. Kim, T. Krishnamohan and K. Saraswat, ``Performance Evaluation of 15nm Gate Length Double-Gate n-MOSFETs with High Mobility Channels: III-V, Ge and Si," The Electroch. Soc. Trans., vol. 16 # (10) pp. 47-55, 2008; also presented at the 214th ECS Meeting, Honolulu, October 2008.
    387. T. Krishnamohan, A. Pham, C. Jungemann, B. Meinerzhagen and K. Saraswat, ``Mobilty Modeling in Ultra-Thin (UT) Strained Germanium (s-Ge) Quantum Well (QW) Heterostructure pMOSFETs," The Electroch. Soc. Trans., vol. 16 # (10) pp. 397-403, 2008, also presented at the 214th ECS Meeting, Honolulu, October 2008.
    388. H. Yu, J. Park, A. Okyay and K. Saraswat, ``Defect Reduction of Ge on Si by Selective Epitaxy and Hydrogen Annealing," The Electroch. Soc. Trans., vol. 16 # (10) pp. 823-828, 2008; also presented at the 214th ECS Meeting, Honolulu, October 2008.
    389. J. Park, M. Tada, H. Yu, D. Kuzum, Y. Na and K. Saraswat, ``Low Temperature Boron Activation in Amorphous Ge for Three Dimensional Integrated Circuits (3D-ICs) using Ni-induced Crystallization," The Electroch. Soc. Trans., vol. 16 # (10) pp. 909-916; 2008, also presented at the 214th ECS Meeting, Honolulu, October 2008.
    390. Gunhan Ertosun, P. Kapur and K. C. Saraswat, ``A Highly Scalable Capacitorless Double Gate Quantum Well Single Transistor DRAM:1T-QW DRAM," IEEE Electron Dev. Lett., Vol. 29, December 2008 pp. 1405-1407.
    391. Jin-Hong Park, M. Tada, P. Kapur, and K. C. Saraswat, "Low temperature boron and phosphorus activation in amorphous germanium using Ni and Co-induced crystallization and its application for three dimensional integrated circuits," Appl. Phys. Lett., 93, 183512, Nov., 2008.
    392. Jin-Hong Park, D. Kuzum, M. Tada, and K. C. Saraswat, "High Performance Germanium N+/P and P+/N Junction Diodes Formed at Low Temperature (<380?C) using Metal-Induced Dopants Activation," Appl. Phys. Lett., 93, 193507, Nov. 2008.
    393. Jin-Hong Park, M. Tada, D. Kuzum, P. Kapur, H-.Y. Yu, H-.S. Philip Wong, and K. C. Saraswat, "Low Temperature (<380?C) and High Performance Ge CMOS Technology with Novel Source/Drain by Metal-Induced Dopants Activation and High-K/Metal Gate Stack for Monolithic 3D Integration," IEEE International Electron Devices Meeting (IEDM) 2008 Technical Digest, pp. 389-392, San Francisco, CA, Dec 15-17, 2008.
    394. T. Krishnamohan, D. Kim, S. Raghunathan, K. C. Saraswat, "Double-Gate Strained-Ge Heterostructure Tunneling FET (TFET) With Record High Drive Currents and <60mV/dec Subthreshold slope," IEEE International Electron Devices Meeting (IEDM) 2008 Technical Digest, pp. 947-949, San Francisco, CA, Dec 15-17, 2008.
    395. Tejas Krishnamohan, D. Kim, T. V. Dinh, A. T. Pham, B. Meinerzhagen, C. Jungemann, K. C. Saraswat, "Comparison of (001), (110) and (111) Uniaxial- and Biaxial- Strained-Ge and Strained-Si PMOS DGFETs for All Channel orientations: Mobility Enhancement, Drive Current, Delay and Off-State Leakage," IEEE International Electron Devices Meeting (IEDM) 2008 Technical Digest, pp. 899-892, San Francisco, CA, Dec 15-17, 2008.
    396. A. Behnam, J. L. Johnson, Y. Choi, G. Ertosun, A. K. Okyay, P. Kapur, K. C. Saraswat and A. Ural, "Experimental characterization of single-walled carbon nanotube film-Si Schottky contacts using metal-semiconductor-metal structures," Appl. Phys. Lett., vol. 92, 243116, 2008.
    397. A. Padovani, L. Larcher, S. Verma, P. Pavan, P. Majhi, K. Parat, G. Bersuker, K. C. Saraswat, " Statistical Modeling of Leakage Currents through SiO2/High-K dielectric stacks for non-voltaile memory applications", IEEE International Reliability Physics Symposium, Phoenix, Arizona, 2008, pp. 616-620
    398. A. Padovani, L. Larcher, S.Verma, P. Pavan, P. Majhi, P. Kapur, K. Parat, G. Bersuker, K. C. Saraswat, " Feasibility of SiO2/Al2O3 Tunnel Dielectric for Future Flash Memories Generations" , International Conference on Ultimate Integration on Silicon (ULSI), Italy, 12-14 March, 2008, pp. 111-114.

      2007
    399. R. Sreenivasana. T. Sugawara K. C. Saraswat and P. C. McIntyre, "High temperature phase transformation of tantalum nitride films deposited by plasma enhanced atomic layer deposition for gate electrode applications," Appl. Phys. Lett., 90, 102101, March 2007.
    400. Jeong-Hee Ha, Kang-Ill Seo, P. C. McIntyre and K. C. Saraswat and Kyeongjae Cho, "Fluorine incorporation at HfO2 /SiO2 interfaces in high-k metal-oxide-semiconductor gate stacks: Local electronic structure," Appl. Phys. Lett., 90, 112911, March 2007.
    401. Hoyeol Cho, P. Kapur and K. C. Saraswat, "A Modulator Design Methodology Minimizing Power Dissipation in a Quantum Well Modulator-Based Optical Interconnect," IEEE J. Lightwave Technology, Vol. 25, No. 6, pp. 1621 - 1628, June 2007
    402. Hoyeol Cho, K.-H. Koo, P. Kapur and K. C. Saraswat,"Modeling of the Performance of Carbon Nanotube Bundle, Cu/Low-K and Optical On-chip Global Interconnects," presented in SLIP 2007, Austin, Texas.
    403. Lee Smith, Makoto Fujiwara, Krishna Saraswat and Yoshio Nishi, "Design Guidelines for High Mobility Channel Bulk n-MOSFETs," Proc. MRS spring meeting, April 2007, San Francisco.
    404. A. Pethe and K. Saraswat, "High Mobility, Low Parasitic Resistance Si/Ge/Si Heterostructure Channel Schottky Source/Drain PMOSFETs," IEEE Device Research Conf., South Bend, Indiana, June 2007.
    405. A. K. Chao, P. Kapur, E. Morifuji, K. C. Saraswat, and Y. Nishi, "Electro-Thermally Coupled Power Optimization for Future Transistors," IEEE Device Research Conf., South Bend, Indiana, June 2007.
    406. S. Verma, E. Pop, P. Kapur, P. Majhi, K. Parat, and K. C. Saraswat, "Feasibility Study of Composite Dielectric Tunnel Barriers for Flash Memory," IEEE Device Research Conf., South Bend, Indiana, June 2007.
    407. Ali K. Okyay, A. J. Pethe, D. Kuzum, S. Latif, D. A. B. Miller and K. C. Saraswat, ``Novel Si-based CMOS Optoelectronic Switching Device Operating in the Near Infrared," OFC/NFOEC conference, Paper JWA38, Annaheim, California, USA, Mar 25 - Mar 29, 2007.
    408. Ali K. Okyay, A. J. Pethe, D. Kuzum, S. Latif, D. A. Miller, K. C. Saraswat, "Novel Si-Based Optoelectronic Switching Device: Light to Latch," CLEO/QELS 2007, Baltimore, Maryland, May 6-11, 2007.
    409. Hoyeol Cho, Kyung-Hoae Koo, P. Kapur, and K. C. Saraswat,"The Delay, Energy, and Bandwidth Comparisons between Copper, Carbon Nanotube, and Optical Interconnects for Local and Global Wiring Application, "√π Proc. IEEE Int. Interconnect Tech. Conf., June 2007, San Francisco, pp. 135-137.
    410. L. Tang, E. Kocabas, S. Latif, A. K. Okyay, D. Ly-Gagnon, K. C. Saraswat, and D. A. B. Miller, "Near-Infrared Photodetector Enhanced by an Open-Sleeve Dipole Antenna," IPNRA 2007, Paper ITuD3, Salt Lake City, Utah, USA, Jul 8 - Jul 11, 2007
    411. E. Kim, J. Chen, D. Choi, N. Goel, C.O. Chui, W. Tsai, J. Harris, Y. Nishi, K. Saraswat and P.C. McIntyre "√∫Electrical and Physical Characterization of ALD-Grown HfO2 Gate Dielectrics on GaAs (100) Substates with Sulfur Passivation, " Spring MRS Meeting, San Francisco, CA, April 9-13, 2007.
    412. E. Kim, P-T. Chen, D. Choi, J. Harris, Y. Nishi, K. Saraswat, and P. McIntyre, "Atomic Layer Deposition of HfO2 on III-V Semiconductors: Effects of Surface Treatment and Post-Deposition Anneals, " TMS Electronic Materials Conference (EMC 2007), University of Notre Dame, IA, June 20-22, 2007.
    413. Kyung-Hoae Koo, Hoyeol Cho, Pawan Kapur, and Krishna C. Saraswat,"Performance Comparisons Between Cu/Low-K Carbon-Nanotube, and Optics for Future On-Chip Interconnects," IEEE Trans. Electron Dev., Vol. 54, No. 12, pp. 3206-3215, December 2007.
    414. J. L. Johnson, A. Behnam, Y. Choi, L. Noriega, G. Ertosun, Z. Wu, Andrew G. Rinzler, P. Kapur, K. C. Saraswat, and Ant Ural, ``Metal-Semiconductor-Metal (MSM) Photodetectors Based on Single-walled Carbon Nanotube Film-GaAs Schottky Contacts, " MRS, Fall Meeting, Boston, MA (2007).
    415. Ali K. Okyay, D. Kuzum, S. Latif, D. A. Miller, K. C. Saraswat, ``CMOS Compatible Silicon-Germanium Optoelectronic Switching Device: Bringing Light to Latch," IEEE Trans. Electron Dev., Vol. 54, No. 12, pp. 3252-3259, December 2007.
    416. Jin-Hong Park, P. Kapur, H. Peng, and K. C. Saraswat, "A very low temperature single crystal germanium growth process on insulating substrate using Ni-induced lateral crystallization for 3 dimensional integrated circuits", Appl. Phys. Lett., 91, 143107, Oct. 2007.
    417. Jin-Hong Park, P. Kapur, H. Peng, and K. C. Saraswat, "Low Temperature, Metal(Ni)-Induced Lateral Crystallization(MILC) of amorphous(a)-Germanium(Ge) for 3-Dimensional Integrated Circuits(3D ICs)", MRS 2007 Fall Meeting, Symposium on Materials and Hyperintegration Challenges in Next-Generation Interconnect Technology, Paper M2.6, Boston, MA, Nov 26-30, 2007.
    418. A. K. Okyay, A. J. Pethe, D. Kuzum, S. Latif, D. A. B. Miller, and K. C. Saraswat, "SiGe optoelectronic metal-oxide semiconductor field-effect transistor," Optics Letters, Vol. 32 Issue 14, pp. 2022-2024 (2007).
    419. D. Kuzum, A. J. Pethe, T. Krishnamohan, Y. Oshima, Y. Sun, J. P. McVittie, P. A. Pianetta, P. C. McIntyre, and K. C. Saraswat, "Interface-Engineered Ge (100) and (111), N- and P-FETs with High Mobility," Tech Digest of IEEE IEDM, Dec. 2007, pp. 723-726.
    420. Hoon Cho, Pwan Kapur, Pranav Kalavade and K. C. Saraswat, ``Highly Scalable Vertical Double Gate NOR Flash Memory," Tech Digest of IEEE IEDM, Dec. 2007, pp. 917-920.
    421. O. Fidaner, A. K. Okyay, J. E. Roth, R. K. Schaevitz, Y. H. Kuo, K. C. Saraswat, J. S. Harris, and D. A. B. Miller, "Ge/SiGe Quantum Well Waveguide Photodetectors on Silicon for the Near-Infrared," IEEE Photon. Technol. Lett., vol. 19, no. 20, pp. 1631-1633, 2007.
    422. O. Fidaner, A. K. Okyay, J. E. Roth, R. K. Schaevitz, Y. H. Kuo, J. S. Harris, K. C. Saraswat, and D. A. B. Miller, "Optical Link on Silicon Employing Ge/SiGe Quantum Well Structures," IEEE LEOS 2007, Paper ThU3, Lake Bueno Vista, Florida, USA, Oct 21 - Oct 25, 2007.
    423. O. Fidaner, A. K. Okyay, J. E. Roth, Y. H. Kuo, K. C. Saraswat, J. S. Harris, and D. A. B. Miller, "Waveguide Electroabsorption Modulator on Si Employing Ge/SiGe Quantum Wells," OSA FiO 2007, Paper FMC2, San Jose, California, USA, Sep 16 - Sep 20, 2007. Recipient of one of the Best Presentation Award
    424. S. Verma, E. Pop, P. Kapur, P. Majhi, K. Parat, and K. C. Saraswat, " Retention Improvement in fluorinated-HfO2/SiO2 Tunnel Stack for Non-Volatile Flash Memory", IEEE SISC, 2007 (Arlington, VA).

      2006
    425. R. Sreenivasan, P. C. McIntyre, H. Kim, and K. C. Saraswat, "Effect of Impurities on the Fixed Charge of Nanoscale HfO2 Films Grown by Atomic Layer Deposition," Appl. Phys. Lett. 89, 112903-1-3 (2006).
    426. Ali K. Okyay, Chi On Chui, and K. C. Saraswat,"Leakage suppression by asymmetric area electrodes in metal-semiconductor-metal photodetectors"ô"ô, Appl. Phys. Lett. 88, 063506 (2006).
    427. Hoyeol Cho, P. Kapur and K. C. Saraswat, "Performance Comparison between Vertical Cavity Surface Emitting Laser and Quantum Well Modulator for Short-distance Optical Links, " IEEE Photonics Tech. Lett. Vol. 18, Feb. 1, 2006, pp. 520-522.
    428. L. Tang, D. A. B. Miller, A. K. Okyay, J. A. Matteo, Y. Yuen, K. C. Saraswat and L. Hesselink, "C-shaped Nano-Aperture-Enhanced Germanium Photodetector", Optics Letters, Vol. 31, May 15, 2006.
    429. Ali K. Okyay, A. M. Nayfeh, K. C. Saraswat, Ann Marshall and Paul C. McIntyre, "Ge on Si by Novel Heteroepitaxy for High Efficiency Near Infrared Photodetection", CLEO 2006, Long Beach, CA., May 2006.
    430. T. Krishnamohan, D. Kim, G. Celler, Y. Nishi, K. C. Saraswat, "Very High Performance, Ultra-thin, Strained-Ge Channel, Heterostructure FETs With High Mobility And Low BTBT Leakage", Symp. B of the E-MRS IUMRS ICEM 2006 Spring Meet., Nice (France), May 29 - June 2, 2006.
    431. Ali K. Okyay, A. M. Nayfeh, K. C. Saraswat, Ann Marshall and Paul C. McIntyre, "Ge on Si by Novel Heteroepitaxy for High Efficiency Near Infrared Photodetection", IEEE Conference on Lasers and Electro-Optics, (CLEO) May 2006.
    432. T. Krishnamohan, D. Kim, C. Jungemann, Y. Nishi and K. C. Saraswat, "Strained-Si, Relaxed-Ge Or Strained-(Si) Ge For Future Nanoscale p-MOSFETs", VLSI Symp., Honolulu, June 2006.
    433. Chi On Chui, F. Ito and K. C. Saraswat, ``Nanoscale Germanium MOS Dielectrics - Part I: Germanium Oxynitrides", IEEE Trans. Electron Dev. vol. 53, no. 7, pp. 1501-1508, 2006.
    434. Chi On Chui, H. Kim, D. Chi, Paul C. McIntyre and K. C. Saraswat, ``Nanoscale Germanium MOS Dielectrics - Part II: High-k Gate Dielectrics", IEEE Trans. Electron Dev. vol. 53, no. 7, pp. 1509-1516, 2006.
    435. Kang-Ill Seo, D.-I. Lee and P. Pianetta, H. Kim, K. C. Saraswat and P. C. McIntyre, "Chemical states and electrical properties of a high-k metal oxide/silicon interface with oxygen-gettering titanium metal overlayer", Appl. Phys. Lett., Vol. 89, p142912 (2006)
    436. Kang-Ill Seo, Sreenivasan, P. C. McIntyre and K. C. Saraswat, "Improvement in High-k (HfO2/SiO2) Reliability by Incorporation of Fluorine", IEEE Electron Dev. Lett., Vol. 27, No. 10, p 821 (2006).
    437. K. C. Saraswat, C. O. Chui, P. Kapur, T. Krishnamohan, A. Nayfeh Ali K. Okyay and R. S. Shenoy, "Performance Limitations of Si CMOS and Alternatives for Nanoelectronics," Int. J. High Speed Electronics and Systems, Vol. 16, No. 1, pp. 175 "ì 192, (2006).
    438. P. Kapur and K. C. Saraswat, "Power/Performance Based Scalability Comparisons between Conventional and Novel Transistors Down to 32nm Technology Node" IEEE SISPAD, Monterey, CA, Sept. 2006, pp. 290-293.
    439. Donghyun Kim, T. Krishnamohan, Y. Nishi, K. C. Saraswat, "Band to Band Tunneling limited Off state Current in Ultra-thin Body Double Gate FETs with High Mobility Materials : III-V, Ge and strained Si/Ge," IEEE SISPAD, Monterey, CA, Sept. 2006, pp. 389-382.
    440. Tejas Krishnamohan, D. Kim, C. Jungemann, Y. Nishi, K. C. Saraswat, "Evaluating Strained/Relaxed-Ge, Strained-Si, Strained-SiGe For Future Nanoscale p-MOSFETs," Proc. Int. Conf. on Solid State Dev. And Mat. (SSDM), Yokohama, Japan, September 2006.
    441. Jungup. Kim, J. McVittie, K. Saraswat and Y. Nishi, "Germanium Surface Cleaning with Hydrochloric Acid," Proc. Symp. SiGe and Ge Materials, Processing, and Devices, 210th Electrochem. Soc. Meet., Cancun, Mexico, Nov. 2006.
    442. T. Krishnamohan, D. Kim, Y. Nishi and K. Saraswat, "Very High Performance, Ultrathin, Strained-Ge Channel, Heterostructure FETs with High Mobility and Low BTBT Leakage," Proc. Symp. SiGe and Ge Materials, Processing, and Devices, 210th Electrochem. Soc. Meet., Cancun, Mexico, Nov. 2006.
    443. Hoon Cho, P. Kapur, P. Kalavade and K. C. Saraswat, "Geometry dependence of Poly-Si Oxidation and Its Application to Self-align, Maskless Process for Nano-scale Vertical CMOS Structures," 210th Electrochem. Soc. Meet., Cancun, Mexico, Nov. 2006.
    444. Hoon Cho, P. Kapur, P. Kalavade and K. C. Saraswat, "A Novel Spacer Process for Sub 25nm thick Vertical MOS and its Integration with Planar MOS Device", IEEE Trans. Nanotech., Vol. 5, No. 5, Sept. 2006 pp. 554-563.
    445. Tejas Krishnamohan1, C. Jungemann, D. Kim, E. Ungersboeck, S. Selberherr, P. Wong, Y Nishi and K. C. Saraswat, "Theoretical Investigation Of Performance In Uniaxially- and Biaxially-Strained Si, SiGe and Ge Double-Gate p-MOSFETs" IEEE Int. Electron Dev. Meet. San Francisco, Dec. 2006.
    446. A. Pethe and K. C. Saraswat, "Interface state Density measurement at GeOxNy-Ge interface for Ge MIS Application, " IEEE SISC, Dec. 2006.
    447. Ali K. Okyay, A. M. Nayfeh, T. Yonehara, A. Marshall, P. C. McIntyre and K. C. Saraswat,"High Efficiency MSM Photodetectors on Heteroepitaxially Grown Ge on Si", Optics Letters, Vol. 31, Issue 17, pp. 2565-2567 (2006).

      2005
    448. C. O. Chui, L. Kulig, J. Moran, W. Tsai and K. C. Saraswat, "A Reason for Poor Ge n-MOSFET Performance: Source/Drain Junction Dose-Dependent Activation," MRS 2005 Spring Meeting, Symposium on Advanced Gate Dielectric Stacks on High-Mobility Semiconductors, Paper G7.3, San Francisco, CA, March 28-April1, 2005.
    449. A. M. Nayfeh, C. O. Chui, T. Yonehara and K. Saraswat, "High Quality Heteroepitaxial-GE Layers on SI by Multi-Step Hydrogen Annealing and Re-Growth," MRS 2005 Spring Meeting, Symposium on Advanced Gate Dielectric Stacks on High-Mobility Semiconductors, Paper G8.4, San Francisco, CA, March 28-April1, 2005.
    450. K.-I. Seo, S. Sun, D.-I. Lee, P. Pianetta, K. C. Saraswat and P. C. McIntyre, "Soft X-ray Photoemission Studies of HfO2 on Ge (001)," MRS 2005 Spring Meeting, Symposium on Advanced Gate Dielectric Stacks on High-Mobility Semiconductors, Paper G12.3, San Francisco, CA, March 28-April1, 2005.
    451. A. Nayfeh, C. O. Chui, T. Yonehara and K. C. Saraswat, "Fabrication of high-quality p-MOSFET in Ge grown heteroepitaxially on Si," IEEE Electron Device Lett., Vol. 26, pp. 311-313, May 2005.
    452. Tejas Krishnamohan, Zoran Krivokapic, Ken Uchida, Yoshio Nishi, Krishna Saraswat, "Low Defect Ultra-thin Fully Strained Germanium MOSFET on relaxed Silicon with High Mobility and Low Band-To-Band-Tunneling (BTBT)," IEEE Symp. VLSI Tech., Kyoto, June 2005.
    453. Hoon Cho, P. Kapur, P. Kalavadeand K. C. Saraswat, "1A Novel Spacer Process for Sub 25nm thick Vertical MOS and its Integration with Planar MOS Device," 2005 Silicon Nanoelectronics Workshop, Kyoto, June 2005.
    454. H. Cho, P. Kapur, and K. C. Saraswat, "The Impact of Technology on Power for High-speed Electrical and Optical Interconnects," Proc. IEEE Int. Interconnect Tech. Conf., June 2005, San Francisco, pp. 177-179.
    455. K.-I. Seo, P. C. McIntyre, S. Sun, D.-I. Lee, P. Pianetta and K. C. Saraswat, "Chemical states and electronic structure of a HfO2/Ge (001) interface," Appl. Phys. Lett., Vol. 87, (4), 25 July. 2005.
    456. Jungyup Kim, K. Saraswat and Y. Nishi, "Study of germanium surface in wet chemical solutions for surface cleaning applications", ECS Transactions; 2005; v.1, no.3, p. 214-219 (2005); also presented at the 208th Meeting of The Electrochem. Soc., Abs. No. 779, Los Angeles, October 2005.
    457. H. Kim, K. C. Saraswat and P. C. McIntyre,"Comparative study on electrical and microstructural characteristics of ZrO2 and HfO2 grown by atomic layer deposition",J. Mater. Res., Vol. 20, No. 11, pp. 3125-3132, Nov 2005.
    458. P. Kapur, R. D. Kekatpure, and K. C. Saraswat, ``Minimizing Power Dissipation In Optical Interconnects at Low Voltage Using Optimal Modulator Design,"√π IEEE Trans. Electron Dev., Volume 52, No. 8, Aug. 2005, pp. 1713 - 1721.
    459. H. Kim, K. C. Saraswat and P. C. McIntyre,"Comparative study on electrical and microstructural characteristics of ZrO2 and HfO2 grown by atomic layer deposition",J. Mater. Res., Vol. 20, No. 11, pp. 3125-3132, Nov 2005.
    460. C. O. Chui, L. Kulig, J. Moran, W. Tsai and K. C. Saraswat, "Germanium n-type Shallow Junction Activation Dependences," Appl. Phys. Lett., 87, 091909, (2005).
    461. C. O. Chui, D.-I. Lee, A. A. Singh, P. A. Pianetta, and K. C. Saraswat, "Zirconia-Germanium Interface Photoemission Spectroscopy Using Synchrotron Radiation," J. Appl. Phys., 97, 113518 (2005).
    462. A. Pethe, T. Krishnamohan, D. Kim, S. Oh, H. "ìS.P. Wong, Y. Nishi and K. Saraswat, "Investigation of the Performance Limits of III-V Double-Gate NMOSFETs", IEEE International Electron Devices Meeting (IEDM) 2005 Technical Digest, pp. 619-622, Washington, D.C., Dec. 2005.
    463. K.-I. Seo, R. Sreenivasan, P. C. McIntyre and K. C. Saraswat, "Improvement in High-k (HfO2/SiO2) Reliability by Incorporation of Fluorine, " IEEE International Electron Devices Meeting (IEDM) 2005 Technical Digest, pp. 619-622, Washington, D.C., Dec. 2005.
    464. K. Uchida, T. Krishnamohan, Y. Nishi and K. Saraswat, "Physical Mechanisms of Electron Mobility Enhancement in Uniaxial Stressed MOSFETs and Impact of Uniaxial Stress Engineering in Ballistic Regime, " IEEE International Electron Devices Meeting (IEDM) 2005 Technical Digest, pp. 135-138, Washington, D.C., Dec. 2005.

      2004
    465. B. Rajendran, P. Kapur, K. C. Saraswat, R. F. W. Pease, "Self-consistent Power/Performance/Reliability Analysis for Copper Interconnects" presented in SLIP 2004, Paris.
    466. C. O. Chui, D.-I. Lee, A. A. Singh, D. Chi, P. C. McIntyre, P. A. Pianetta, and K. C. Saraswat, "Synchrotron Radiation Photoemission Spectroscopy of High-k Gate Stack in High-performance Ge MOS Devices," MRS 2004 Spring Meeting, Symposium on Joint Session: High-k and High Mobility Substrates, Paper B5.2/D5.2, San Francisco, CA, April 12-16, 2004.
    467. C.O. Chui and , K.C. Saraswat,''Advanced germanium MOSFET technologies with high-k gate dielectrics and shallow junctions,'' Int. Conf. on IC Des. and Tech., vol. 650, pp. 245-252. Austin, TX, 2004. http://doi.org/10.1109/ICICDT.2004.1309955.
    468. H. Kim, P.C. McIntyre, and K. C. Saraswat, "Microstructural evolution of ZrO2-HfO2 nanolaminate structures grown by atomic layer deposition," J. Mat. Res. Vol. 19, No. 2, Feb 2004.
    469. C. O. Chui, H. Kim, P. C. McIntyre, and K. C. Saraswat, "Ge MOS Dielectric Stack with ALD High-k Metal Oxide and Oxynitride Interlayer," MRS 2004 Spring Meeting, Symposium on High-Mobility Group-IV Materials and Devices, Paper B8.7, San Francisco, CA, April 12-16, 2004.
    470. Kang-ill Seo, P. C. McIntyre and K. Saraswat, "High-k (ZrO2, HfO2) Dielectrics on Si Substrates Synthesized by Elevated Temperature UV-Ozone Oxidation Technique," MRS 2004 Spring Meeting, Symposium on High-Mobility Group-IV Materials and Devices, Paper D3.14, San Francisco, CA, April 12-16, 2004.
    471. H. Kim, P. C. McIntyre, S. Stemmer, C. O. Chui and K. C. Saraswat, "High-k Interface Engineering: the Interaction of Reactive Metal Electrodes with ALD-ZrO2/SiO2 and HfO2/SiO2 Gate Stacks," MRS 2004 Spring Meeting, Symposium on High-Mobility Group-IV Materials and Devices, Paper D4.4, San Francisco, CA, April 12-16, 2004.
    472. Paul McIntyre, H. Kim, D. Chi, C. O. Chui, B. Triplett, A. Javey, H. Dai and Krishna Saraswat, "Novel Deposition Processes for High-k/Ge Devices: Interface Engineering," MRS 2004 Spring Meeting, Symposium on High-Mobility Group-IV Materials and Devices, Paper D5.1/B5.1, San Francisco, CA, April 12-16, 2004.
    473. D. Chi, C. O. Chui, S. Ramanathan, B. Triplett, K. C. Saraswat and P. C. McIntyre, "Metal Oxide/Semiconductor Interfaces in UV-Ozone Oxidized High-k Dielectric Stacks on Si and Ge (001) Substrates," MRS 2004 Spring Meeting, Symposium on High-Mobility Group-IV Materials and Devices, Paper D5.6/B5.6, San Francisco, CA, April 12-16, 2004.
    474. C. O. Chui, H. Kim, P. C. McIntyre and K. C. Saraswat, "Atomic Layer Deposition of High-k Dielectric for Germanium MOS Applications - Substrate Surface Preparation," IEEE Electron Dev. Lett., Vol. EDL-25, pp. 274-276, May 2004.
    475. H. Cho, P. Kapur, and K. C. Saraswat, "Power Comparison between High-speed Electrical and Optical Interconnects for Inter-chip Communication", Proc. IEEE Int. Interconnect Tech. Conf., June 2004, San Francisco.
    476. M. S. Bakir, C. O. Chui, A. K. Okyay, K, C. Saraswat and J. D. Meindl, "Integration of Optical Polymer Pillars Chip I/O Interconnections with Si MSM Photodetectors," IEEE Trans. Electron Dev. VOL. 51, NO. 7, JULY 2004, pp. 1084-1090.
    477. H. Kim, P.C. McIntyre, C.O. Chui, K.C. Saraswat, and S. Stemmer, "Engineering Chemically Abrupt High-k/Silicon Interfaces Using Oxygen-Gettering Metal Overlayers," presented at WODIM 2004, Kinsale,Ireland, June 29, 2004. (Best paper award)
    478. D. Chi, C. O. Chui, K. C. Saraswat B. Triplett, and P. C. McIntyre, "Zirconia grown by ultraviolet ozone oxidation on germanium (100) Substrates", J. Appl Phys., Vol. 96, No 1, pp. 813 - 819, 1 July 2004
    479. H. Cho, P. Kapur, and K. C. Saraswat, "Power Comparison between High-speed Electrical and Optical Interconnects for Inter-chip Communication", IEEE J. Lightweight Tech. Vol. 22, pp. 2021-2033, Sept. 2004.
    480. C. O. Chui, F. Ito and K. C. Saraswat, "Scalability and Electrical Properties of Germanium Oxynitride MOS Dielectrics," IEEE Electron Dev. Lett., Vol. EDL-25, pp. 613-615, Sept. 2004.
    481. H. Kim, P. C. McIntyre, C. O. Chui, K. C. Saraswat and M. H. Cho, "Interfacial characteristics of HfO2 grown on nitrided Ge (100) substrates by atomic-layer deposition," Appl. Phys. Lett., Vol. 85, No. 14, pp. 2902-2904, 4 Oct. 2004
    482. A. Nayfeh, C. O. Chui, . K. C. Saraswat and T. Yonehara, "Effects of hydrogen annealing on heteroepitaxial-Ge layers on Si: Surface roughness and electrical quality," Appl. Phys. Lett., Vol. 85, No. 14, pp. 2815-2817, 4 Oct. 2004
    483. R. S. Shenoy and Krishna C. Saraswat, "Novel Process for Fully Self-Aligned Planar Ultrathin Body Double-Gate FET," IEEE SOI Conf, October 2004.
    484. T. Krishnamohan, C. Jungemann, K. C. Saraswat, "Very High Performance, Sub-20nm, Strained Si and Six Ge1-x, Hetero-structure, Center Channel (CC) NMOS and PMOS DGFETs," IEEE SISPAD, Sept. 2004.
    485. A. Pethe, T. Krishnamohan, K. Uchida, K. C. Saraswat, "Analytical Modeling of Ge and Si Double-Gate(DG) NFETs and the Effect of Process Induced Variations (PIV) on Device Performance," IEEE SISPAD, Sept. 2004.
    486. A. Nayfeh, C. O. Chui, . K. C. Saraswat and T. Yonehara, "Effects of Hydrogen Annealing on Heteroepitaxial-Ge layers on Si : Surface Roughness and Electrical Quality," 206th meet. Electrochem. Soc., Honolulu, October 2004.
    487. P. Kapur, R. S. Shenoy, A. K. Chao, Y. Nishi and K. C. Saraswat, "Power Optimization of Future Transistors and a Resulting Global Comparison Standard," IEEE IEDM, San Francisco, Dec. 2004.
    488. K.-I. Seo, P. C. McIntyre, H. Kim, and K. C. Saraswat, ``Formation of an interfacial Zr-silicate layer between ZrO2 and Si through in situvacuum annealing,"√π Appl. Phys. Lett., Vol. 86, December 2004.

      2003
    489. H. Kim, P.C.McIntyre and K. C. Saraswat, "Effects Of Crystallization on the Electrical Properties of Ultrathin HfO2 Dielectrics Grown by Atomic Layer Deposition," Appl. Phy. Lett. Vol. 82, No. 1, 6 January 2003, pp. 106-108.
    490. P. Kapur and K. C. Saraswat, ``Optical Interconnects for Future High Performance Integrated Circuits,"√π Physica E, Vol. 16, pp. 620-627, 2003.
    491. Amol R. Joshi, T. Krishnamohan and K. C. Saraswat, "A Model for Crystal Growth During Metal Induced Lateral Crystallization of Amorphous Silicon," J. Appl. Phys. Vol. 93 , No. 1, January 2003, pp. 175-181.
    492. M.Y. Liao, J.P. McVittie, M.D. Deal, K. C. Saraswat and B. Schueler, "Mass Transfer for Cross-Contamination with ZrO2 Plasma Etching," AVS 4th International Conference on Microelectronics and Interfaces (ICMI), March 6, 2003, Santa Clara, CA.
    493. H. Kim, P.C.McIntyre and K. C. Saraswat, "Atomic layer deposition of ZrO2 on W for metal-insulator-metal capacitor application," Appl Phys. Lett., Vol. 82, No. 17, 28 April 2003, pp. 2874-2876.
    494. Ali K. Okyay, Chi On Chui, and Krishna C. Saraswat, "Asymmetric Group IV MSM Photodetectors with Reduced Dark Currents," CLEO June 2003.
    495. H. Kim, P. C. McIntyre, and K. C. Saraswat, "The Structural and Electrical Properties of Ultra-Thin HfO2 and Nanolaminates Synthesized by Atomic Layer Deposition," IEEE Semiconductor Interface Specialists Conference (SISC), SanDiego (2002).
    496. Amol R. Joshi and K. C. Saraswat, "Nickel induced crystallization of a-Si gate electrode at 500C and MOS capacitor reliability," IEEE Trans. Electron Dev., Volume 50, No. 4 , April 2003, pp. 1058 -1062
    497. R. S. Shenoy and K. C. Saraswat, 'Optimization of Extrinsic Source/Drain Resistance in Ultrathin body Double-Gate FETs', 2003 Silicon Nanoelectronics Workshop, Kyoto, June 2003.
    498. D. Wang, Q. Wang, A. Javey, R. Tu, H. Dai, H. Kim, P. C. McIntyre, T. Krishnamohan and K. C. Saraswat, "Germanium nanowire field-effect transistors with SiO2 and high- kHfO2gate dielectrics, Appl Phys. Lett., Vol. 83, No. 12, 22 September 2003, pp. 2432-2434.
    499. T. Krishnamohan, Z. Krivokapic, K. C. Saraswat, "A novel sub-20nm Depletion-Mode Double-Gate (DMDG) FET," IEEE SISPAD, Sept. 2003
    500. Chi On Chui, K. GopalaK.n, P. B.Griffin, J. D.Plummer and K. C. Saraswat, "Activation and Diffusion Studies of Ion-implanted p and n Dopants in Germanium" Appl Phys. Lett., Vol. 83, No. 16, 20 October 2003, pp 3275 - 3277.
    501. D. Chi, B. B. Triplett, P. C. McIntyre, C. O. Chui, K. C. Saraswat, E. Garfunkel, and T. Gustafsson, "High-k Metal Oxides Dielectrics on Ge (100) Substrates," MRS 2003 Spring Meeting, Symposium on Advanced Gate Stack Materials, Paper D3.17, San Francisco, CA, April 21-25, 2003.
    502. D. Chi, C. O. Chui, S. Ramanathan, B. B. Triplett, K. C. Saraswat, and P. C. McIntyre, "UV-Ozone Oxidized High-k Dielectrics on Si and Ge Substrates," The 45th TMS Electronic Materials Conference (EMC) Digest, Paper S5, Salt Lake City, UT, June 25-27, 2003.
    503. H. Kim, P. C. McIntyre, C. O. Chui, and K. C. Saraswat, "Atomic Layer Deposition of ZrO2 on Si and Ge Substrate," MRS 2003 Spring Meeting, Symposium on High-k Dielectrics, Paper D2.11, San Francisco, CA, April 21-25, 2003.
    504. Chi On Chui, Ali K. Okyay, and K. C. Saraswat, "Effective Dark Current Suppresion with Asymmetric MSM Photodetectors in Group IV Semiconductors," IEEE PhotonicsTech. Lett., Vol. 15, Nov. 2003, pp. 1585-1587.
    505. H. Kim, P. C. McIntyre, and K. C. Saraswat, "Crystallization of HfO2 Synthesized by Atomic Layer Deposition: Electrical and Microstructural Behavior," ECS Fall Meeting, Orlando (2003).
    506. T. Krishnamohan, C. Jungemann and K. C. Saraswat, "A novel, very high performance, sub-20nm Depletion-Mode Double-Gate (DMDG) Si/SixGe(1-x)/Si channel PMOSFET", IEEE Int. Electron Dev. Meet., Washington, D.C., Dec. 2003.
    507. C. O. Chui, H. Kim, P. C. McIntyre, and K. C. Saraswat, "A Germanium NMOSFET Process Integrating Metal Gate and Improved Hi-k Dielectrics," IEEE International Electron Devices Meeting (IEDM) 2003 Technical Digest, pp. 437-440, Washington, DC, December 7-10, 2003.
    508. Rohit S. Shenoy and Krishna C. Saraswat, "Optimization of Extrinsic Source/Drain Resistance in Ultrathin body Double-Gate FETs", IEEE Trans. Nanotechnology, Vol. 2, Dec. 2003, pp. 265-270.
    509. H. Kim, P.C. McIntyre, and K. C. Saraswat, "Microstructural evolution of ZrO2-HfO2 nanolaminate structures grown by atomic layer deposition," J. Mat. Res. Vol. 19, No. 2, Feb 2004.
    510. H. Kim, A. Marshall, P.C. McIntyre, and K. C. Saraswat, "Crystallization kinetics and microstructure-dependent leakage current behavior of ultra-thin HfO2 dielectrics: in-situ annealing studies," Appl. Phys. Lett. 84, 2064 (2003).

      2002
    511. P. Kapur, J. P. McVittie and K. C. Saraswat. "Technology and Reliability Constrained Future Copper Interconnects -- Part I: Resistance Modeling," IEEE Trans. Electron Dev., Vol. 49, No. 4, April 2002, pp. 590-597.
    512. P. Kapur, G. Chandra, J. P. McVittie and K. C. Saraswat. "Technology and Reliability Constrained Future Copper Interconnects -- Part II: Performance Implications," IEEE Trans. Electron Dev., Vol. 49, No. 4, April 2002, pp. 598-604.
    513. H.-S. Kim, P.C. McIntyre, K.C. Saraswat, "Electrical and Materials Properties of ALD-Grown ZrO2 and HfO2 Gate Dielectrics," MRS 2002 spring meeting, April 2002, San Francisco.
    514. T.-Y. Chiang, K. Banerjee, and K. C. Saraswat, "Analytical Thermal Model for Multilevel VLSI Interconnects Incorporating Via Effect," IEEE Electron Device Letters, Vol. 23, No. 1, pp. 31-33, January 2002.
    515. P. Kapur and K. C. Saraswat ">Comparisons Between Electrical and Optical Interconnects for On-Chip Signaling," Proc. IEEE Int. Interconnect Tech. Conf., June 2002, San Francisco, pp. 89-91.
    516. P. Kapur and K. C. Saraswat "Power Dissipation in Optical Clock Distribution Network for High Performance ICs," Proc. IEEE Int. Interconnect Tech. Conf., June 2002, San Francisco, pp. 151-153.
    517. G. Chandra, P. Kapur and K. C. Saraswat "A Methodology for the Interconnect Performance Evaluation of 2D and 3D Processors with Memory," Proc. IEEE Int. Interconnect Tech. Conf., June 2002, San Francisco, pp. 164-166.
    518. G. Chandra, P. Kapur and K. C. Saraswat "Scaling Trends for the On Chip Power Dissipation," Proc. IEEE Int. Interconnect Tech. Conf., June 2002, San Francisco, pp. 170-172
    519. B. P. Shieh, M.D. Deal, K.C. Saraswat, R. Choudhury, C-W. Park, V. Sukharev, W. Loh and P. Wright, "Electromigration Reliability of Low Capacitance Air-Gap Interconnect Structures," Proc. IEEE Int. Interconnect Tech. Conf., June 2002, San Francisco, pp. 203-205.
    520. T-Y Chiang, B. Shieh and K. Saraswat, "Impact of Joule Heating on Scaling of Deep Sub-Micron Cu/Low-K Interconnects," Digest of 2002 Symposium on VLSI Technology, Honolulu, Hawaii, June 2002, pp. 141-142.
    521. P. Kalavade, J. M. Hergenrother, T. W. Sorsch, S. Aravamudhan, M. K. Bude, E. J. Ferry, F. P. Klemens, A. Kornblit, W. M. Mansfield, J. F. Miner, D. Monroe, G. D. Wilk, P. M. Voyles, J. L. Grazul, K. C. Saraswat, "The Ultrathin-Body Vertical Replacement-Gate MOSFET: A Highly-Scalable, Fully-Depleted MOSFET with a Deposition-Defined Ultrathin (< 15 nm) Silicon Body," 2002 IEEE Si Nanoelectronics Workshop June 9-10, 2002, Honolulu, Hawaii
    522. Chi On Chui, S. Ramanathan, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, "Ultrathin High-k Gate Dielectric Technology for Germanium MOS Applications," IEEE Device Research Conf., Santa Barbara, June 2002.
    523. P. Kapur, G. Chandra and K. C. Saraswat, "Power Estimation in Global Interconnects and its Reduction using a Novel Repeater Optimization Methodology," Proc. of 39th Design Automation Conference (DAC), pp. 461-465, June 2002.
    524. Chi On Chui, S. Ramanathan, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, "Germanium MOS Capacitors Incorporating Ultrathin High-k Gate Dielectric," IEEE Electron Dev. Lett., Vol. EDL-23, pp. 473-475, August 2002.
    525. Yaocheng Liu, Michael D. Deal, Krishna C. Saraswat, and James D. Plummer, "Single-crystalline Si on insulator in confined structures fabricated by two-step metal-induced crystallization of amorphous Si," Appl. Phys. Lett., Vol. 81, No. 24, 9 December 2002.
    526. Chi On Chui, H. S. Kim, David Chi. B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, "A Sub-400'C Germanium MOSFET Technology with High-k Dielectric and Metal Gate," IEEE Int. Electron Dev. Meet., San Francisco, December 2002.
    527. Hyoungsub Kim, P. C. McIntyre, and K. C. Saraswat, ``Materials and Electrical Properties of ZrO2, HfO2 and Nano-laminate Gate Dielectrics Grown by ALD,"√π MRS Fall Meeting, Boston (2002).
    528. Hyoungsub Kim, P. C. McIntyre, and K. C. Saraswat, ``The Structural and Electrical Properties of Ultra-Thin HfO2 and Nanolaminates Synthesized by Atomic Layer Deposition,"√π IEEE Semiconductor Interface Specialists Conference (SISC), SanDiego (2002).

      2001
    529. S. Abdollahi-Alibeik, J. Zheng, C.T. Gabriel, J. P. McVittie, K.C. Saraswat. S. Abraham, "Modeling and Simulation of Feature-Size-Dependent Etching of Metal Stacks," JVST B, Jan/Feb, 2001.
    530. J. A. Davis, R. Venkatesan, A. Kaloyeros, M. Beylansky, S. J. Souri, K. Banerjee, K. C. Saraswat, A. Rahman, R. Reif, and J. D. Meindl, "Interconnect Limits on Gigascale Integration (GSI) in the 21st Century," Proc. IEEE, VOL. 89, No. 3, March 2001.
    531. C. M. Perkins, B. B. Triplett, and P. C. McIntyre, K. Saraswat S. Haukka and M. Tuominen, "Electrical and Material Properties of ZrO2 Gate Dielectrics by Atomic Layer Chemical Vapor Deposition," Applied Physics Letters.
    532. C. M. Perkins, B. B. Triplett, P. C. McIntyre and K. Saraswat, "Si/ZrO2/Si Gate Stack Systems," MRS Symp. on Gate Stack and Silicide Issues in Si Processing, abs. no. K1.5, San Francisco, April 2001.
    533. H. Kim, P. C. McIntyre and K. Saraswat, "Phase Diagram Simulations in Amorphous metal Silicate Systems," MRS Symp. on Gate Stack and Silicide Issues in Si Processing, abs. no. K2.11, San Francisco, April 2001.
    534. T.-Y. Chiang, K. Banerjee, and K. C. Saraswat, "A New Analytical Thermal Model for Multilevel ULSI Interconnects Incorporating Via Effect," Proc. IEEE Int. Interconnect Tech. Conf., June 2001, San Francisco, pp. 92~94.
    535. P. Kapur, J. P. McVittie and K. C. Saraswat. "Realistic Copper Interconnect Performance with Technological Constraints,Interconnect Performance Modeling for 3-D ICs With Multiple Si Layers," Proc. IEEE Int. Interconnect Tech. Conf., June 2001, San Francisco, pp. 233-235.
    536. T.-Y. Chiang and K. C. Saraswat, "Impact of Vias on the Thermal Characteristics of Deep Sub-Micron Cu/low-k Interconnects," VLSI Tech. Symp. Kyoto, Japan, June 2001.
    537. P. Kalavade and K. C. Saraswat, "Lateral Gate All-Around (GAA) poly-Si Transistors," Abstracts of the IEEE SOI Conference, September 2001.
    538. V. Sukharev, B. P. Shieh, R. Choudhury, C. Park and K. C. Saraswat, "Reliability studies on Multilevel Interconnection with Intermetal Dielectric Airgaps," Microelectronics Reliability, 41, 2001, pp. 1631-1635.
    539. T.-Y. Chiang, S. J. Souri, Chi On Chui, and K. C. Saraswat, "Thermal Analysis of Heterogeneous 3-D ICs with Various Integration Scenarios," IEEE Int. Electron Dev. Meet., Washington, DC, December 2001, pp. 681-684.
    540. T.-Y. Chiang, K. Banerjee, P. and K. C. Saraswat, "Compact Modeling and SPICE-Based Simulation for Electrothermal Analysis of Multilevel ULSI Interconnects," Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on , 2001 pp. 165 -172.

      2000
    541. T. C. Yang and, K. C. Saraswat "Effect of Physical Stress on the Degradation of Thin SiO2 Films Under Electrical Stress," IEEE Trans. Electron Dev. vol. 47, No. 4, pp. 746~755, April 2000.
    542. M. Toita, P. Kalavade and K. C. Saraswat, "Control of Amorphous Si Crystallization Using Ge Deposited by LPCVD" Proc. MRS Symp. Vol. 609 No. A9.5, 2000.
    543. A. W. Wang and K. C. Saraswat, "A strategy for modeling of variations due to grain size in polycrystalline thin film transistors," IEEE Trans. Electron Dev. vol. 47, pp. 1035~1043, May 2000.
    544. K. Banerjee, A. Mehrotra, W.R. Hunter, K. C. Saraswat, K.E. Goodson and S. S. Wong, "Quantitative Projections of Reliability and Performance for Low-k/CuInterconnect Systems," Proc. IEEE Int. Reliability Phys. Symp., San Jose, pp. 283-288, April 2000.
    545. S. J. Souri, K. Banerjee, A. Mehrotra and K. C. Saraswat, "Multiple Si Layer ICs: Motivation, Performance Analysis, and Design Implications," 37th ACM Design Automation Conference (DAC), June 5~9, Los Angeles, CA, 2000, pp. 213~220.
    546. P. Kalavade and K. C. Saraswat, "A Novel sub-10nm transistor", Abstracts of the IEEE Device Research Conference, June 2000, pp. 71~72.
    547. P. Kalavade, A. R. Joshi, V. Subramanian and K. C. Saraswat, "High performance 200nm single-grain TFTs fabricated using a self-aligned germanium seeding technology", 2000 MRS Spring Meeting,San Fransisco, abs. no. A31.5, 2000
    548. M. Joshi, J. P. McVittie, K. Saraswat, C. Cismaru and J. L. Shohet, "Measurement of VUV Induced Surface Conduction in Dielectrics Using Synchrotron Radiation," 5th Internat. Symp.on Plasma Process Induced Damage Conf., Santa Clara, CA, May 2000, pp. 14~17.
    549. M. Joshi, J. P. McVittie and K. Saraswat, "Direct Experimental Determination and Modeling of VUV Induced Bulk Conduction in Dielectrics during Plasma Processing," 5th Internat. Symp.on Plasma Process Induced Damage Conf., Santa Clara, CA, May 2000, pp. 157~160.
    550. J. P. McVittie, M. Joshi, K. C. Saraswat, "Effects of VUV on Plasma Charging," Dry Process Symposium Proceedings, Tokyo, Japan, pp. 25~30 , Nov. 2000.
    551. Ting-Yen Chiang, K. Banerjee, and K. C. Saraswat, "Effect of Via Separation and Low-k Materials on the Thermal Characteristics of Cu Interconnects," IEEE Int. Electron Dev. Meet., San Francisco, December 2000, pp. 261~264.
    552. Q. Xiang, J. Jeon, P. Sachdev, B. Yu, K. C. Saraswat and M. Lin, "Very High Performance 40nm CMOS with Ultra-thin Nitride/Oxynitride Stack Gate Dielectric and Pre-doped Dual Poly-Si Gate Electrode," IEEE Int. Electron Dev. Meet., San Francisco, December 2000, pp. 860~861.

      1999
    553. N. Bhat, A. Wang and K.C.Saraswat, "Rapid thermal anneal of gate oxides for low thermal budget TFTs," IEEE Trans. Electron Dev., vol. 46, pp. 63~69, Jan. 1999.
    554. P. Smeys, P. B. Griffin, Z. U. Rek, I. DeWolf and K. C. Saraswat, "Influence of Process-Induced Stress on Device Characteristics and its Impact on Scaled Device Performance," IEEE Trans. Electron Dev., vol. 46, pp.1245~1252, June 1999.
    555. T. C. Yang, P. Sachdev and K. C. Saraswat, "Dependence of fermi level positions at gate and substrate on the reliability of ultrathin MOS gate oxides," IEEE Trans. Electron Dev. vol. 46, No. 7. pp. 1457~1463., July 1999.
    556. V. Subramanian, M. Toita, N. R. Ibrahim, S. J. Souri and K. C. Saraswat, "Low-leakage Germanium-seeded Laterally-crystallized Single-grain 100nm TFTs for Vertical Integration Applications," IEEE Electron Dev. Lett., Vol. 20, No. 7, July, 1999, pp. 341~343.
    557. S.-H. Lee, P. Sachdev, T.-C. Yang, J. C. Bravman, and K. C. Saraswat, "Effect of interface stress on the quasi-breakdown of ultrathin oxide," Abs. in Proc 196th Meeting of the Electrochem. Soc., Honolulu, October 1999.
    558. S. Abdollahi-Alibeik, J. P. McVittie, K.C. Saraswat, V. Sukharev, P. Schoenborn, "Analytical modeling of silicon etch process in high density plasma," J. Vac. Sci. & Tech. A: Vacuum, Surfaces, and Films - September 1999 - Volume 17, Issue 5, pp. 2485~2491.
    559. B.P. Shieh, K. Saraswat, M. Deal, and J. McVittie, "Air Gaps Lower K of Interconnect Dielectrics," Solid State Technology, February 1999, p. 51~8.
    560. B.P. Shieh, J. McVittie, M. Deal, K. C. Saraswat and S. Nag, "Flux Characterization and Topography Simulation of HDP-CVD of Silicon Dioxide," 1st Int. Conf. on Adv. Materials and Processes for Microelectronics, American Vac. Soc. Abs # S2-MoP8, March 1999, San Jose.
    561. P. Kapur, J. McVittie, M. Deal, K. C. Saraswat R. Bubber, G. Shang and S. Gopinath, "Surface Morphology of Metallo-Organic CVD of Copper Films for Seed Layer in Integrated Interconnects," 1st Int. Conf. on Adv. Materials and Processes for Microelectronics, American Vac. Soc. Abs # S1-WeM4, March 1999, San Jose.
    562. M. Y. Liao, K. Wong, J. P. McVittie, and K. C. Saraswat , "Abatement of perfluorocarbons with an inductively coupled plasma reactor," J. Vac. Sci. & Tech. B: Vacuum, Surfaces, and Films ,Nov. 1999. vol.17, no.6, p. 2638~43.
    563. Amol R. Joshi and K. C. Saraswat, "Sub-micron Thin Film Transistors with Metal Induced Lateral Crystallization," 196th Meeting of the Electrochem. Soc., Honolulu, Hawaii, abstract no. 1358, 1999.
    564. S. J. Souri and K. C. Saraswat, "Interconnect Performance Modeling for 3-D ICís With Multiple Si Layers," Proc. IEEE Int. Interconnect Tech. Conf., pp. 24~26, June 1999, San Francisco.

      1998
    565. B. Shieh, K. C. Saraswat, J.P. McVittie, S. List, S. Nag, M. Islamraja, R.H. Havemann, "Air-Gap Formation During ILD Deposition to Lower Interconnect Capacitance," IEEE Electron Device Lett., vol. 19, no. 1, January 1998, pp. 16~18.
    566. B. Shieh, L. C. Bassman, D.-K. Kim, K. C. Saraswat, M. Deal, J.P. McVittie, R. S. List, S. Nag, and L. Ting, "Air-Gap Formation During ILD Deposition to Lower Interconnect Capacitance," Proc. IEEE Int. Interconnect Tech. Conf., June 1998, San Francisco, pp. 16~18.
    567. L.C. Bassman, N.R. Ibrahim, P.M. Pinsky, K. C. Saraswat, and M.D. Deal, "Mesoscale Modeling of Diffusion in Polycrystalline Structures," Proc. IEEE Int. Conf. On Simulation of Semiconductor Process and Devices, Sept. 1997, pp. 149~152.
    568. V. Subramanian and, K. C. Saraswat "Optimization of Silicon-Germanium TFTs Through the Control of Amorphous Precursor Characteristics," IEEE Trans. Electron Dev., vol. 45, pp. 1690~1695, August 1998.
    569. V. Subramanian and K. C. Saraswat, "High Performance Germanium-Seeded Laterally Crystallized TFTs for Vertical Device Integration," IEEE Trans. Electron Dev., vol. 45, no. 9, September 1998, pp. 1934~1939.
    570. R. Sharangpani, J. das, S. P. Tay, R. P. S. Thakur, T. C. Yang, K. C. Saraswat, ``Growth of High Quality Wet Oxide by Rapid Thermal Processing, Proc. 6th Int. Conf. on Adv. Thermal Processing of Semiconductors, RTP98, pp. 17-19, Sept. 1998, Kyoto, Japan.
    571. A. W. Wang and K. C. Saraswat, "Silicon interlayer heterojunction effects in polycrystalline Si1-xGex thin film transistors," 56th Annual Device Research Conference, Presented at the 56th Annual Device Research Conference, Charlottesville, Virginia, pp. 106~7, June 24, 1998.
    572. A. W. Wang and K. C. Saraswat, "Evidence for heterojunction effects in polycrystalline Si1-xGex thin film transistors with Si caps," Presented at the 1998 Spring Meeting of the Materials Research Society, San Francisco, California, April 14, 1998. Published in Materials Research Society Symposium Proceedings 577 (Epitaxy and Applications of Si-Based Heterostructures)
    573. A. W. Wang and K. C. Saraswat, "Passivation of poly-Si thin film transistors with ion-implanted deuterium," Presented at the 1998 Spring Meeting of the Materials Research Society, San Francisco, California, April 14, 1998. Published in MRS Symp. Proceedings 508 (Flat-Panel-Display Materials and Large-Area Processes)
    574. N. Bhat and K. C. Saraswat, "Characterization of border trap generation in rapid thermally annealed oxides deposited using silane chemistry," Journal of Applied Physics, vol. 84, no. 5 , p. 2722, Sept. 1998.
    575. P. Kapur, D. Bang, J.P. McVittie, K.C. Saraswat, T. Mountsier, "Method for angular sputter yield extraction for high-density plasma chemical vapor deposition simulators," J. Vac. Sci. & Tech. B (Microelectronics and Nanometer Structures) AIP for American Vacuum Soc, May-June 1998. vol.16, no.3, p. 1123~8.
    576. Albert W. Wang and Krishna C. Saraswat, "Modeling of grain size variation effects in polycrystalline thin film transistors," Technical Digest of the IEEE International Electron Device Meeting, San Francisco., December 1998., pp. 277~280.

      1997
    577. S. Jurichich, S. C. Wood, and K. C. Saraswat, "Cost Modeling of Low Temperature Large-Area Polysilicon TFT LCD Manufacturing," SPIE Symp. on Electronic Imaging Science and Technology, Feb. 1997.
    578. V. Subramanian, F. L. Degertekin, P. Dankoski, B. T. Khuri-Yakub and K. C. Saraswat, "In-Situ Monitoring of Crystallinity and Temperature During Rapid Thermal Crystallization of Si on Glass/ Quartz Using an Acoustic Sensor," J. Electrochem. Soc. vol. 144, no. 6, june 1997, pp. 2216~2221.
    579. V. Subramanian, P. Dankoski, F. L. Degertekin, B. T. Khuri-Yakub and K. C. Saraswat, "Controlled 2-step Solid-Phase Crystallization for High Performance TFTs," IEEE Electron Device Lett., vol. 18, no. 8, August 1997, pp. 378~381.
    580. T. C. Hsiao, Albert W. Wang, Krishna Saraswat, and Jason C.S. Woo, "An alternative gate electrode material of fully depleted SOI CMOS for low power applications," 1997 IEEE International SOI Conference Proceedings, pp. 20-1 (1997) Presented at the 1997 IEEE International SOI Conference (Fish Camp, California, USA) on October 6, 1997.
    581. L.C. Bassman, B.P. Shieh, D.-K. Kim, R.P. Vinci, J.P. Mcvittie,K. C. Saraswat, and M.D. Deal, "Simulation of the effect of dielectric air gaps on interconnect reliability," MRS spring meeting, April 1997, San Francisco.
    582. V. Subramanian and K. C. Saraswat, "Laterally Crystallized Polysilicon TFTs Using Patterned Light Absorption Masks," Device Research Conf., Boulder, Abs. No. III.A.3, June. 1997.
    583. V. Subramanian and K. C. Saraswat, "A Novel Technique for 3-D Integration: Ge-seeded Laterally Crystallized TFTs," Symp. VLSI Technology, Kyoto, Japan, June 1997.
    584. T. C. Yang, N. Bhat and, K. C. Saraswat "Effect Of Interface Stress on Reliability of Gate Oxide," Proc. Symp. Silicon Nitride and Silicon Oxide Thin Insulating Films, the Electrochem. Soc., Ed. J. Deen, M. Brown, K. Sundaram, S. Raider, Vol. PV 97-10, pp. 34~45, 1997.
    585. D. Connelly and K. C. Saraswat, "Compound GeSi Structures: Novel Measurement Algorithm via Optical Reflectance Sptryectromet," 39th TMS Electronic Materials Conference, Paper No. H10, June 1997, Colorado.
    586. N. Bhat, M. Cao and K. C. Saraswat, "Bias temperature instability in hydrogenated thin film transistors," IEEE Trans. Electr. Dev., vol. 44, July 1997, pp. 1102~1108.
    587. S. Ma, J. P. Mcvittie K. C. Saraswat, "Prediction of Plasma Charging Induced Gate Oxide Damage by Plasma Charging Probe," IEEE Electron Dev. Lett., vol. 18, October 1997, pp. 468~470.

      1996
    588. P. Kapur, D.S. Bang, J.P. McVittie and K. C. Saraswat, "Simulation of Aluminum Surface Profile in Trenches and Contacts/Vias For Ionized Physical Vapor Deposition," Proceedings of VLSI Multilevel Interconnect Conference, Santa Clara, pp. 201~206, June 1996.
    589. Y.J. Lee, B. T. Khuri-Yakub and K. C. Saraswat, "Temperature Measurement in Rapid Thermal Processing Using the Acoustic Temperaturre Sensor," IEEE Trans. Semicond. Manufacturing, vol. 9, No. 1, pp. 115~121, February 1996.
    590. S. Jurichich, S. C. Wood and K. C. Saraswat, "Manufacturing Cost of Active-Matrix Liquid-Crystal Displays as a Function of Plant Capacity" IEEE Trans. on Semiconductor Manufacturing, vol. 9, No. 4, November 1996, pp. 562~572.
    591. N. Bhat, P. Apte and K. C. Saraswat, "Charge Trap Generation in LPCVD Oxide Under High Field Stressing," IEEE Trans. Electron Devices., Vol. 43, No. 4, April 1996, pp 554~560.
    592. M. Cao, S. Talwar, K. J. Kramer, T. W. Sigmon, and K. C. Saraswat, "A High-Performance Polysilicon Thin-Film Transistor Using XeCl Excimer Laser Crystallization of Pre-Patterned Amorphous Si Films," IEEE Trans. Electron Devices., vol. 43, No. 4, April 1996, pp. 561~567.
    593. N. Bhat, A. Wang and K. Saraswat, "Effect of annealing ambient on performance and reliability of LPCVD oxides for TFTs," MRS Symp. on Flat Panel Display Materials II, May 1996, San Francisco, vol. 424, pp. 287~292.
    594. N. Bhat, A. Wang and K. C. Saraswat, "Rapid Thermal Anneal of Gate Oxide for low Thermal Budget TFTs," SID 1996 spring meeting, May 1996, San Diego.
    595. A. Wang, Navakanta Bhat and K. Saraswat, "TMCTS for gate dielectric in thin film transistors," MRS Symp. on Flat Panel Display Materials II, May 1996, San Francisco, vol. 424, pp. 281~286.
    596. T.C. Yang and K. C. Saraswat, "A Study of Growth Conditions on Ultrathin MOS Gate Oxide Reliability," MRS 1996 spring meeting, May 1996, San Francisco.
    597. V. Subramanian, K. Saraswat, H. Hovagimian and J. Mehlhaff. "Optimization and Modeling of Silicon-Germainium Thin Film Transistors for AMLCD Applications using a Plackett-Burman Experimental Design," IEEE Statistical Metrology Workshop, Hawaii, June 9, 1996.
    598. V. Subramanian, F.L. Degertekin, P. P. Dankoski, B.T. Khuri-Yakub and K. C. Saraswat, "A Novel Technique for In-Situ Monitoring of Crystallinity and Temperature During Rapid Thermal Annealing of Thin Si/Si-Ge Films on Quartz/Glass," MRS Symp. on Flat Panel Display Materials II, May 1996, SanFrancisco, vol. 424, pp. 267~272.
    599. V. Subramanian, N. Bhat and K. C. Saraswat, "Accelerated Breakdown in Thin Oxide Films due to Interfacial Stress and Carrier Depletion," MRS 1996 spring meeting, May 1996, San Francisco.
    600. S. Tomita, S. S. Jurichich, and K. C. Saraswat, "Transistor Sizing for AMLCD Integrated TFT Drive Circuits," SID 16th Int. Didplay Res. Conf., Birmingham, U.K., Oct. 1~3, 1996.
    601. P. Smeys, P. B. Griffin, and K. C. Saraswat, "Influence of post-oxidation cooling rate on residual stress and pn-junction leakage current in LOCOS isolation structures," IEEE Trans. Electr. Dev., vol. 43, pp. 1989~1993, Nov. 1996.
    602. P. Smeys, P. B. Griffin, Z. Rek, I. Wolf and K. C. Saraswat, "The Influence of Oxidation Induced Stress on the Generation Current and its Impact on Scaled Device Performance," IEEE Int. Electron Dev. Meet., San Francisco, December 1996, pp. 709~712.

      1995
    603. D. S. Bang, J.P. McVittie, K. C. Saraswat, J.A. Iacponi, J. Gray, Z. Krivokapic, and K. Littau, "Simulation Studies of TiN PVD and CVD Thin Films forin-Film Processi Contact/Via Liners, in Modeling and Simulation of Thng," ed. D.J. Srolovitz. Materials Research Society Symposium Proceedings Vol. 389 (April 1995), p. 173~179.
    604. J. Li, J.P. McVittie, J. Ferziger, K. C. Saraswat, J. Dong, "Optimization of a Intermetal Dielectric Deposition Module Using Simulation," J. Vac. Sci. & Technol., B 13(4), pp. 1867~74 (1995).
    605. D. S. Bang, J.P. McVittie, K. C. Saraswat, Z. Krivokapic, J.A. Iacoponi, and J. Gray, "Three Dimensional PVD Virtual Reactor for VLSI Metalization," IEDM Tech. Digest, p.97~100 Dec. 1995.
    606. D. S. Bang, Z. Krivokapic, M. Hohmeyer, J.P. McVittie and K. C. Saraswat, "Three Dimensional Simulation for Sputter Deposition Equipment and Processes" in Simulation of Semiconductor Devices and Processes, Electrochemical. Soc.Vol. 6, pp. 166~169 (1995).
    607. P. Smeys, P. B. Griffin, and K. C. Saraswat, "An improved calibration methodology for modeling advanced isolation structures," Simulation of semiconductor devices and processes, H. Ryssel and P. Pichler (Eds.), 6, p. 42 (1995).
    608. P. Smeys, P. B. Griffin, and K. C. Saraswat, "Material properties of LPCVD silicon nitride for modeling and calibrating the simulation of advanced isolation structures," J. Appl. Phys., 78, p. 2837 (1995).
    609. P. Smeys, P B. Griffin, and K. C. Saraswat, "Geometry dependence of polysilicon void formation in deep submicron PBL isolation technologies: evidence of the stress relaxation model," Proc. 5th International ULSI Science and Technology Symp., (The Electrochemical Society, Reno), p. 94 (1995).
    610. W. Abdel-Ati, S. Ma, T.-C. Yang, J.P. McVittie, and K. C. Saraswat, "Comparison of Automated Capacitor Testing Methods for Plasma Charging Induced Damage," Proc. Electrochem. Soc. Symp. on ULSI Sci. and Technol., Vol. 95-5, May. 1995, pp. 410~417.
    611. M. Cao, , A. W. Wang and K. C. Saraswat, "Low Pressure Chemical Vapor Deposition of Si1-x Gex Films on SiO2 Characterization and Modeling," J. Electrochem. Soc., vol. 142, No. 5, May 1995, pp. 1566~1572.
    612. D. S. Bang, .M. Cao, , A. W. Wang and K. C. Saraswat, and T-J. King, "Resistivity study of boron and phosphorous doped polycrystalline Si1-x Gex films," Applied Physics Letters, 66 (2), 9 January 1995, pp. 195~197.
    613. Min Cao, T. Zhao, K. C. Saraswat, and J. D. Plummer, "Study on Hydrogenation of Polysilicon Thin Film Transistors by Ion Implantation," IEEE Trans. Electron Devices., Vol. 42, No. 6, June 1995, pp. 1134~1140.
    614. L. Degertekin, P. Dankoski, B. T. Khuri-Yakub and K. C. Saraswat, "In-situ Ultrasonic wafer Temperature Sensor for RTP," 3rd Int. Rapid Thermal Processing Conf., August 1995, Amsterdam.
    615. K. C. Saraswat, "Rapid Thermal Multiprocessing for a Programmable Factory for Manufacturing of ICs," Proc. Nato ASI on Advances in Rapid Thermal and Integrated Processing, Edited by F. Rozeboom July 3~14, 1995, Maratea, Italy.
    616. P. Dankoski, F. L. Degertekin, B. T. Khuri-Yakub, G. Franklin and K. C. Saraswat, "Toward RTP Control Using Ultrasonic Sensor," 3rd Int. Rapid Thermal Processing Conf., August 1995, Amsterdam.
    617. C. McLaughlin, S. Jurichich, S. Wood, K. Saraswat, "Effects of Plant Scale on AM-LCD Amortization Costs," Digest of Technical Papers 1995 Display Manufacturing Technology Conference, p.10, 1995.
    618. H. Park, P. Smeys, Z. H. Sahul, K. C. Saraswat, R. W. Dutton, and H. Hwang, "Quasi-Three-Dimensional Modeling of Sub-Micron LOCOS Structures," IEEE Trans. Semicond. Manufacturing, VOL. 8, NO. 4, November 1995.
    619. S. Ma, J. P. McVittie, and K. C. Saraswat, "Effects of Wafer Temperature on Plasma Charging Induced Damage to MOS Gate Oxides," IEEE Electron Device Lett., Vol. 16, No. 12, December 1995, pp. 534~536.
    620. N. Bhat, M. Cao and K. Saraswat, "Bias temperature instability in hydrogenated polysilicon thin film transistors," Society for information display international symposium digest of technical papers vol. 26, p. 393 (1995).

      1994
    621. L. Degertekin, J. Pei, B.T. Khuri-Yakub And K. C. Saraswat, "In-Situ Acoustic Temperature Tomography of Semiconductor Wafers," Applied Physics Letters, Vol. 64(11), 14 March 1994, pp. 1338~1340.
    622. Pushkar P. Apte and K. C. Saraswat, "Modeling Ultrathin Dielectric Breakdown on Correlation of Charge Trap-generation and Charge-to-breakdown," 1994 Proc. IEEE Int. Reliability Phys. Symp., San Jose, April 1994, pp 136~42.
    623. K. C. Saraswat, B. T. Khuri-Yakub, P. P. Apte, L. Booth, Y. H. Chen, P. Dankoski, L. Degertekin, G. Franklin, M. M. Moslehi, C. Schaper, P. Gyugyi, Y. J. Lee, and J. Pei, S. C. Wood, "Rapid Thermal Multiprocessing for Adaptable Manufacturing of ICs," IEEE Trans. Semiconductor Manufacturing, Vol. 7, No. 2, May 1994, pp. 159~175.
    624. C. Schaper, M. M. Moslehi, K. C. Saraswat and T. Kailath, "Control of MMST RTP: Reproducability, Uniformity, and Integration Flexible Manufacturing," IEEE Trans. Semiconductor Manufacturing, Vol. 7, No. 2, May 1994, pp. 202~219.
    625. T. J. King, J. P. McVittie, K. C. Saraswat, and J. R. Pfiester, "Electrical Properties of Heavily Doped Polycrystalline Silicon-Germanium Films," IEEE Transactions on Electron Devices, Vol. 41, No. 2, Feb. 1994, pp. 228~232.
    626. T. Zhao, M. Cao, J. D. Plummer, and K. C. Saraswat, ``A twin polysilicon TFT planar EEPROM cell,"√π 1994 Nonvolatile Semiconductor Memory Workshop, Monterey, CA.
    627. Min Cao, T. Zhao, K. C. Saraswat, and J. D. Plummer, "A Simple EEPROM Cell Using Polysilicon Thin Film Transistors," IEEE Electron Device Lett., Vol. 15, No. 8, August 1994, pp. 304~306.
    628. T. J. King and K. C. Saraswat, "Deposition and Properties of Low-Pressure Chemical-Vapor Deposited Polycrystalline Silicon-Germanium Films," J. Electrochem. Soc., Vol. 141, No. 8, August 1994, pp. 2235~2240.
    629. S. Talwar, M. Cao, K.-J. Kramer, K. C. Saraswat, and T.W. Sigmon, "High-performance thin-film transistors fabricated by XeCl excimer laser annealing without post-hydrogenation," in 52nd IEEE Device Research Conf., Boulder, Colorado, June 1994.
    630. N. Bhat and K. C. Saraswat, "Interface -state Generation in Deposited Oxides due to Bias Temperature Stress," Extended abstracts, Spring 1994 Meeting of the. Electrochem Society, Abs No. 119, p. 179 San Francisco, May 1994.
    631. D. S. Bang, J. P. McVittie, M. M. IslamRaja, K. C. Saraswat, Z. Kirvokapic, S. Ramaswami, and R. Cheung, "Profile Modeling of Collimated Ti Physical Vapor Deposition," in Proceedings of 10th Symp. on Plasma Processing, 185th Meeting of the Electrochem Society in San Francisco, ECS Proc. Vol. 94-20, 557~567, 1994.
    632. S. Jurichich, T.-J. King, K. C. Saraswat and J. Mehlhaff, "Low-Thermal-Budget Polycrystalline Silicon-Germanium Thin-Film Transistors Fabricated by Rapid Thermal Annealing," Japan Journal of Applied Physics, Vol. 33, No. 8B, Part 2, 1994.
    633. T.J. King and K. C. Saraswat, "Fabrication and Characterization of Polycrystalline Silicon-Germanium Thin-Film Transistors," IEEE Transactions on Electron Devices, Vol. 41, No. 9, pp. 1581~1591, September 1994.
    634. Pushkar P. Apte and K. C. Saraswat, "Correlation of trap-generation and charge-to-breakdown Qbd A Physical-damage Model of Dielectric Breakdown," IEEE Trans. Electron Devices, Vol. 41, No. 9, pp. 1595~1602, September 1994.
    635. Min Cao, T. Zhao, K. C. Saraswat, and J. D. Plummer, "A Vertical Submicron Polysilicon Thin Film Transistors Using a Low Temperature Process," IEEE Electron Device Lett., Vol. 15, No. 10, October 1994, pp. 415~417.
    636. M. Cao, S. C. Kuehne, K. C. Saraswat, and S. S. Wong, "A Low Thermal Budget Polycrystalline Silicon Thin Film Transistor Using Chemical Mechanical Polishing," SID/IEEE Int. Display Research Conf. Monterey, CA, Oct., 1994.
    637. C. Schaper, M. M. Moslehi, K. C. Saraswat and T. Kailath, "Modeling, Identification, and Control of Rapid Thermal Processing," J. Electrochem. Soc., Vol. 141, No. 11, November 1994, pp. 3200~3209.
    638. Levent Degertekin, P. E. Roche, B. V. Honin, J. Pei, B. T. Khuri-Yakub and K. C. Saraswat, "Ultrasonic Temperature Measurement in RTP," 2nd Int. Rapid Thermal Processing Conf., August 1994, Monterey, CA.
    639. J. Li, J. P. McVittie, J. Ferziger, K. C. Saraswat, M. Schmidt and D Dobkin, "Profile Simulation Studies of Oxide Deposition from Ozone/TEOS," 10th Symp. on Plasma Processing in 185th Meeting of the Electrochem Society, San Francisco, May 1994.
    640. P. Dankoski, L. Booth, G. Franklin, and K. C. Saraswat, "RTP Temperature Sensing - Just How Hot Is It?," 33rd Conf. on Decision and Control, 1994.
    641. D. S. Bang, J.P. McVittie, M.M. IslamRaja, K. C. Saraswat, Z. Krivokapic, and R. Cheung, "Modeling of Ti Physical Vapor Deposition Systems," Intnl. Mtg Numerical Modeling of Process and Device for Integrated Ckts: NUPAD-V, pp. 41~44, Honolulu, June, 1994.
    642. D. S. Bang, J.P. McVittie, M.M. IslamRaja, K. C. Saraswat, Z. Krivokapic, S. Ramaswami and R. Cheung, "Dynamic Modeling of Collimator Clogging in Physical Vapor Deposition Systems," Proceedings VLSI Multilevel Interconnect Conference (VMIC), p. 554, June, 1994.
    643. K. Hsiau, D.S. Bang, J.P. McVittie, R. Dutton, K. C. Saraswat, S. Tripathi, A.J. Bariya and D.B. Kao, "Simulation of Tungsten Etchback for Via and Contact Plugs," Proceedings VLSI Multilevel Interconnect Conference (VMIC), pp. 545~547, June, 1994.
    644. D. S. Bang, K. Hsiau, J.P. McVittie, K. C. Saraswat, Z. Krivokapic, M. Vicente, S, Gupta, R. Alvis, "Simulation of a Tungsten Filled Via Process Module for Process Integration," paper MS-Mo A7, Am. Vac. Soc. 41st Nat. Symp, Denver, Oct. 1994, and submitted to J. Vac. Sci. and Technol.
    645. D. S. Bang, K. C. Saraswat, Z. Krivokapic, J.P. McVittie, "A Multipule Target Sputter System with Enhanced Wafer Uniformity, Lifetime Uniformity, and Wafer Scaleability," IEDM Tech. Digest, p. 549~552, 1994.
    646. J. Li, J.P. McVittie, K. C. Saraswat, and S.E. Lassig, "Modeling Studies of Mechanisms in Biased ECR CVD," Proceedings VLSI Multilevel Interconnect Conference (VMIC), pp. 524~526, June, 1994.
    647. J. Li, J.P. McVittie, J. Ferziger and K. C. Saraswat, "Use of Simulation to Optimize Multistep Intermetal Dielectric Deposition from PECVD and Ozone/TEOS APCVD Processes," Proceedings VLSI Multilevel Interconnect Conference (VMIC), pp. 539~541, June, 1994.
    648. J. Li, J.P. McVittie, J. Ferziger, K. C. Saraswat, J. Dong, "Optimization of a Intermetal Dielectric Deposition Module Using Simulation," paper MS-Mo A9, Am. Vac. Soc. 41st Nat. Symp, Denver, Oct. 1994.
    649. Y. Chen, L. Booth, C. Schaper, B. T. Khuri-Yakub and K. C. Saraswat, "3D Modeling of Rapid Thermal Processors for Design Optimization of a New Flexible RTP System," IEEE Int. Electron Dev. Meet., San Francisco, December 1994, pp. 545~548.
    650. N. Bhat and K. Saraswat, "Degradation of LPCVD oxides," Abstracts of Int. Display Research Conf., Oct. 10~13, 1994, Monterey, CA., p. 310

      1993
    651. M.M. IslamRaja, M.A. Cappelli, J.P. McVittie and K. C.Saraswat, "Profile Modeling of Diamond CVD," Extended Abstracts of Spr. Mtg. of the Electrochem. Soc., May, 1993.
    652. P. Apte, T. Kubota and K. C. Saraswat, "Constant Current Stress Breakdown in Ultrathin SiO2Films," in The Physics and Chemistry of SiO2 and the Si SiO2Interface 2," edited by C. R. Helms and B. E. Deal, Plenum, 1993, pp. 447~454.
    653. Levent Degertekin, J. Pei, Y. J. Lee, B. T. Khuri-Yakub and K. C. Saraswat, "In-Situ Temperature Monitoring in RTP by Acoustical Techniques," MRS Spring Meeting, San Francicco, MRS Vol. 303 - Rapid Thermal and Integrated Processing, July 1993.
    654. Y. Eguchi, M.M. Islamraja, J.P. McVittie and K. C. Saraswat, "Step Coverage Modeling of Physical Vapor Deposition of Ti and WSix," Proceedings 10th Int'l VLSI Multilevel Interconnect Conf. (VMIC), p. 517~519, 1993.
    655. Y. Eguchi, M.M. Islamraja, J.P. McVittie and K. C. Saraswat, "Profile Modeling of Physical Vapor Deposition of Ti and WSix," Proceedings 3rd Int'l Symp. Proc. Phys. and Modeling in Semicon. Technol., the Electrochem. Soc., Abs. No. 715, vol. 93-2 , 1993.
    656. M. Cao, , A. W. Wang and K. C. Saraswat, "Low Pressure Chemical Vapor Deposition of Si1-x Gex Films," Spring 1993 Electro Chemical Soc. Mtg., Proc. of the 3rd International Symp. on Process Physics and Modeling in Semiconductor Technology, Vol.93-6, p.350, May 1993, Honolulu.
    657. P. Apte, T. Kubota and K. C. Saraswat, "Constant Current Stress Breakdown in Ultrathin SiO2Films," J. Electrochemical Society, Vol. 140, No. 3, March, 1993, pp. 770~773.
    658. C.Y. Chang, J. P. McVittie, K. C. Saraswat, "Backscattering Deposition in Ar Sputtering of Oxide," Appl. Phys. Lett., vol. 63(16), pp. 2294~2296, 1993.
    659. M.M. Islamraja, C. Chang, J. P. McVittie, M. A. Cappelli, and K. C. Saraswat, "Two Precursor Model for LPCVD of Silicon Dioxide from TEOS," J. Vac. Sci. and Tech. B, p. 720~726, June, 1993.
    660. K. C. Saraswat. "Programmable Factory for IC Manufacturing for the 21st Century," Proc. IEEE/SEMI Int. Semiconductor Manufacturing Science Symp., San Francisco, July 19 , 1993, pp. 2~6.
    661. S. Wood and K. C. Saraswat, "Configuration and Management Strategies for Cluster-Based Fabs," Proc. IEEE/SEMI Int. Semiconductor Manufacturing Science Symp., San Francisco, July 19 , 1993, pp. 63~68.
    662. S. Wood and K. C. Saraswat, "Performance Evaluation of Adaptable Manufacturing Systems for Semiconductor IC Production," 1993 Symposium on VLSI Technology, Kyoto, Japan, Abstract on pp. 133~134, May 19, 1993.
    663. K. C. Saraswat, S. C. Wood, J. D. Plummer and P. Losleben, "Programmable Factory for Adaptable IC Manufacturing," Symp. VLSI Technology, Kyoto, Japan, May 1993.
    664. Y.J. Lee, F. L. Degertekin, J. Pei, B.T. Khuri-Yakub And K. C. Saraswat, "In-Situ Acoustic Thermometry Tomography Rapid Thermal Processing Semiconductor Wafers," Digest of 1993 IEEE International Electron Device Meeting, December 1993, Washington D.C., pp. 187~190.
    665. Pushkar P. Apte and K. C. Saraswat, "SiO2degradation with charge injection polarity," IEEE Electron Device Lett., Vol. 14, No. 11, Nov. 1993.
    666. S. Wood and K. C. Saraswat, "Adaptable Manufacturing Systems," Int. Symp. on Semiconductor Manufacturing, Austin, September 20~21, 1993.
    667. L. Degertekin, J. Pei, Y.J. Lee, B.T. Khuri-Yakub and K. C. Saraswat, "In-Situ Temperature Monitoring In RTP By Acoustical Techniques," MRS Spring Meeting, San Francicco, April 1993.
    668. Y.H. Chen, C. Schaper and K. C. Saraswat,"Computer Aided Design of Rapid Thermal Processors," MRS Spring Meeting, Symposium on Rapid Thermal and Integrated Processing San Francisco, April 12~15, 1993.
    669. P. Apte, H. Park, C. R. Helms and K. C. Saraswat, "Thermally Driven In-situ Removal of Native Oxide Using Anhydrous HF," In Interface Control of Electrical, Chemical, and Mechanical Properties, Mat. Res. Proc., Vol. 318, pp. 281~286, 1993.
    670. M. Cao, T. Zhao, K. C. Saraswat, and J. D. Plummer, "Hydrogenation of polycrystalline TFTs by ion implantation," Proceeding of Active Matrix Liquid Crystal Displays Symposium, p.2, Oct. 1993, Bethlehem.
    671. T. Zhao, M. Cao, J. D. Plummer, and K. C. Saraswat. "A novel vertical submicron polysilicon TFT," Proceeding of Active Matrix Liquid Crystal Displays Symposium, p.14, Oct. 1993, Bethlehem.
    672. T. Zhao, Min Cao, J. D. Plummer, and K. C. Saraswat, "A novel floating gate spacer polysilicon TFT," Digest of 1993 IEEE International Electron Device Meeting, December 1993, Washington D.C., pp. 393-396.
    673. S. Jurichich, T.-J. King, K. C. Saraswat and J. Mehlhaff, "A Low-Thermal-Budget Polycrystalline Silicon-Germanium Thin-Film Transistor Technology for Large-Area Electronics," International Semiconductor Device Research Symposium, 1993 December 1, Charlottesville, VA.
    674. C. Schaper, M. Moslehi, K. Saraswat, and T. Kailath, "Real-Time Multi-Zone Temperature Control of Rapid Thermal Processing Semiconductor Device Manufacturing Equipment," In Proc. of American Control Conference, San Francisco, CA 1993.
    675. Levent Degertekin, J. Pei, Y. J. Lee, B. T. Khuri-Yakub and K. C. Saraswat, "In-Situ Acoustic Thermometry of Semiconductor Wafers," 1993 IEEE Sonics and Ultrasonics Symposium, Baltimore, Maryland Oct. 31~ Nov. 3, 1993.

      1992
    676. P. Raje, K. C. Saraswat, and K. Cham, "A New Methodology for Design of BiCMOS Gates and Comparison with CMOS," IEEE Transactions on Electron Device, Vol. 39, No. 2, February 1992, pp. 339~347.
    677. P. Raje, K. C. Saraswat, and K. Cham, "Performance Driven Scaling of BiCMOS Technology," IEEE Transactions on Electron Device, Vol. 39, No. 3, March 1992, pp. 685~694.
    678. T.J. King and K. C. Saraswat, "Low-Temperature (<550?C) Fabrication of Poly-Si TFTs for Large-Area LCDs," IEEE Electron Device Letters, Vol. 13, No. 6, June 1992, pp. 309~311.
    679. P. Apte and K. C. Saraswat, "Rapid Thermal Processing Uniformity Using Multivariable Control of a Circularly Symmetric 3 Zone Lamp," IEEE Trans. Semiconductor Manufacturing, Vol. 5, No. 3, pp. 180~188, August 1992.
    680. C. Y. Chang, J.P. McVittie, and K. C. Saraswat, "Modeling of PECVD TEOS Oxide Step Coverage Using an Overhang Structure," 9th Symp. on Plasma Processing, 181st meeting of The Electrochem. Soc., St. Louis, Vol. 92-18, p.575~582, May, 1992.
    681. M. M. Islamraja, M. Cappelli J. P. McVittie, and K. C. Saraswat, "A 3-Dimensional Model for Low-Pressure Chemical-Vapor-Deposition Step in Trenches and circular Vias," J. Appl. Phys., Vol. 70(11), 1991., pp. 7137~7140.
    682. M. M. Islamraja, A. J. Bariya, J. P. McVittie, M. A. Cappelli, K. C. Saraswat, L. Moberly, and L. Lahiri "Modeling and Simulation of Plasma Enhanced Chemical Vapor Deposition of Silicon Nitride," 9th Symp. on Plasma Processing, 181st meeting of The Electrochem. Soc., St. Louis, May, 1992.
    683. M. M. Islamraja, A. J. Bariya, K. C. Saraswat, M. A. Cappelli, J. P. McVittie, L. Moberly, and L. Lahiri "Development of Design Rules for Tungsten Plugs Using Simulation," IEEE Int. Reliability Physics Symp. Monterey, 1992.
    684. C. L. Chu, K. C. Saraswat and S. S. Wong, "Measurement of Lateral Dopant Diffusion in Thin Silicide Layers," IEEE Transactions on Electron Device, Vol. 39, No. 10, October 1992, pp. 2333~2340.
    685. M. Cao, T. J. King and K. C. Saraswat, "Determination of the Densities of Gap States in Hydrogenated Polycrystalline Si and Si0.8Ge0.2 Films," Applied Physics Letters, Vol. 61(6), August 10, 1992, pp 672~674.
    686. P. Apte and K. C. Saraswat, "Rapid Thermal Multeprocessing Using Multivariable Control of a Circularly Symmetric 3 Zone Lamp," Proc. Symp. on VLSI Technology, Seattle, May 1992, pp. 52~53.
    687. K. C. Saraswat and Samuel C. Wood, "Adaptable Manufacturing Systems for Microelectronics Manufacturing: Economic and Performance Issues," Strategies for Innovation and Changes in the U.S. and Japan, An IBEAR Research Conf., Univ. of Southern Calif., May 10-12, 1992.

      1991
    688. H.C. Wulu, K. C. Saraswat and J. P. McVittie, "Simulation of Mass Transport for Deposition in Via Holes and Trenches," J. Electrochem. Soc., Vol. 138, June, 1991, pp. 1831~1840.
    689. P. Raje, R. Ritts, K. Cham, J. Plummer, and K. C. Saraswat, "MBiCMOS:A Device and Circuit Technique Scalable to the Sub-micron, Sub-2V Regime," Digest of Technical Papers, IEEE International Solid State Circuits Conf., San Francisco, Feb. 1991, pp. 150~151.
    690. L.Y. Cheng, J. P. McVittie and K. C. Saraswat, "A New Test Structure to Identify Step Coverage Mechanisms in CVD SiO2," Applied Physics Letters, Vol. 58(19), 13 May 1991, pp. 2147~2149.
    691. J.C. Rey, L.-Y. Cheng, J. P. McVittie and K. C. Saraswat, "Monte Carlo Low Presssure Deposition Profile Simulation," J. Vacuum Science and Technology (A), Vol. 9(3), pp. 1083~1087, May/June 1991.
    692. M.M. Islamraja, J. P. McVittie, M. Cappelli and K. C. Saraswat, "A General Analytical Model for Low Pressure Deposition in 3--D Structures," 7th Int. Conf. on Numerical Analysis of Semiconductor Devices and Integreted Circuits, Copper Mountain, Colorado, April 8~12, 1991.
    693. P. Apte, M. M. Moslehi, R. Yeakley, and K. C. Saraswat, "Silicon Epitaxy Following Low Temperature Gas-Phase Removal of Native Oxide Using Anhydrous Hydrogen Fluoride," Abstracts of MRS Symp. on Rapid Thermal and Integrated Processing, abs. no. F5.9, p. 157 Materials Research Society, Anaheim, May 1991.
    694. P. Apte, M. M. Moslehi, R. Yeakley, and K. C. Saraswat, "Low Temperature In-Situ Native Oxide Removal Using Anhydrous Hydrogen Fluoride," 3rd Int. Symp. ULSI Sci. Technol., The Electrochem. Soc., Abs. No. 378, Washington D.C., May 1991.
    695. P. Apte, S. Wood, L. Booth, K. C. Saraswat, and M. M. Moslehi, "Temperature Uniformity Optimization Using Three Zone Lamp and Dynamic Control in A Rapid Thermal Multiprocessor," Abstracts of MRS Symp. on Rapid Thermal and Integrated Processing, abs. no. F4.8, p. 155 Materials Research Society, Anaheim, May 1991.
    696. Samuel C. Wood and K. C. Saraswat, "Modeling the Performance of Cluster-Based Fabs," Proc. International Semiconductor Manufacturing Science Symposium. San Francisco, May 20, 1991, pp. 8~14.
    697. Samuel C. Wood and K. C. Saraswat, "Factors Affecting the Economic Performance of Cluster-Based Fabs," Proc. Third International Symposium of ULSI Science and Technology, the Electrochem. Soc., Washington, D.C., May 9, 1991, pp. 551~565.
    698. K. C. Saraswat and T. J. King, "Polycrystalline Silicon-Germanium for CMOS and TFT Applications," Symp. on CVD issues in ULSI Interconnects and TFTs, American Vac. Soc., May 30, San Jose.
    699. T.J. King, J. Pfiester, and K. C. Saraswat, "A Variable-Workfunction Polycrystalline-Si1-x Ge-x Gate Material for Submicron CMOS Technologies," IEEE Electron Device Letters, Vol. 12, No. 10, October 1991, pp. 533~535.
    700. H. Singh, E. S. G. Shaqfeh, J.P. McVittie, and K. C. Saraswat, "Simulation of Reactive Ion Etching with Surface Re-emission," Presented at the 180th meeting of The Electrochem. Soc., Phoenix, October, 1991.
    701. T.J. King, J. Pfiester, and K. C. Saraswat, "PMOS Transistors in LPCVD Polycrystalline Silicon-Germanium Films," IEEE Electron Device Letters, Vol. 12, No. 11, November 1991, pp. 584~586.
    702. M.Mazhar Islamraja, C.Y. Chang, J.P. McVittie, M.C. Cappelli, K. C. Saraswat, "Two Precursor Model for LPCVD of Oxide from TEOS," 38th Annual Symposium and Topical Conference of the American Vacuum Society, November 11~15, 1991, Seattle, Washington.
    703. C.Y. Chang, M.M. Islamraja, J.P. McVittie, K. C. Saraswat, "PECVD Oxide Step Coverage Experiment andd Simulation," 38th Annual Symposium and Topical Conference of the American Vacuum Society, November 11~15, 1991, Seattle, Washington.
    704. C. Schaper, Y. Cho, P. Guigui, G. Hoffman, S. Norman, P. Parks, S. Boyd, G Franklin, T. Kailath, and K. C. Saraswat, "Dynamics and Control of Rapid Thermal Processing," Proc. SPIE Symp. on Rapid Thermal and Integrated Processing, September 1991.
    705. C.L. Chu, G. Chin, K. C. Saraswat, S. S. Wong and R. Dutton "Technology Limitations for N+/P+ Polycide Gate CMOS due to Lateral Dopant Diffusion in Silicides/Polysilicon Layers," IEEE Electron Device Letters, Vol. 12, No. 12, December 1991, pp. 696~698.
    706. T.J. King and K. C. Saraswat, "A Low Temperature (<550?C) Germanium-Silicon MOS Thin Film Transistor Technology for Large Area Electronics," IEEE International Electron Device Meeting, December 1991, Washington D.C.
    707. R. Ritts, P. A. Raje, J. D. Plummer, K. C. Saraswat and K. Cham,``Merged BiCMOS Logic to Extend the CMOS/BiCMOS Performance Crossover Below 2.5V Supply,'' IEEE J. Solid State Circuits, Vol. 26, No. 11, November 1991, pp. 1606--1614.

      1990
    708. Y.J. Lee, C. H. Chou, B. T. Khuri-Yakub, and K. C. Saraswat, "Non-Invasive Process Temperature Monitoring Using Laser-Acoustic Technique," Symp. on VLSI Technology, Honolulu, June 1990.
    709. P. Raje, K. Cham, and K. C. Saraswat, "BiCMOS Gate Performance Optimization Using Unified Delay Model," Proc. Symp. on VLSI Technology, Honolulu, June 1990, pp. 91~92.
    710. L.Y. Cheng, J. C. Rey, J. P. McVittie and K. C. Saraswat, "Sticking Coefficient as a Single Parameter to Characterize Step Coverage of SiO2 Processes," Proceedings 7th International IEEE VLSI Multilevel Interconnection Conference, Santa Clara, June 1990, pp. 404~406.
    711. J.C. Rey, L.-Y. Cheng, J. P. McVittie and K. C. Saraswat, "Numerical Simulations of CVD Trench Filling Using a Surface Reaction Coefficient Model," Proceedings 7th International IEEE VLSI Multilevel Interconnection Conference, Santa Clara, June 1990, pp. 425~427.
    712. N. Kasai, P. Wright, and K. C. Saraswat, "Hot-Carrier-Degredation Characteristics for Fluorine-Incorporated nMOSFETs," IEEE Transactions on Electron Devices, Vol. 37, No. 6, June 1990, pp. 1426~1431.
    713. P. Wright, A. Kermani and K. C. Saraswat, "Nitridation and Post-Nitridation Anneals of SiO2 for Ultrathin Dielectrics," IEEE Transactions on Electron Devices, Vol. 37, No. 8, August 1990, pp. 1836~1841.
    714. P. Wright and K. C. Saraswat, "Thickness Limitations of SiO2 Gate Dielectrics for MOS ULSI," IEEE Transactions on Electron Devices, Vol. 37, No. 8, August 1990, pp. 1884~1892.
    715. J.P. McVittie, J. C. Rey, L.-Y. Cheng, A. Bariya, S. Ravi and K. C. Saraswat, "SPEEDIE: A Profile Simulator for Etching and Deposition," Extended Abstracts, SRC Techcon '90, San Jose, October 1990, pp. 16~19.
    716. A. Bariya, J. P. McVittie, C. W. Frank, K. C. Saraswat, J. C. Rey, and S. Ravi, "Modeling and Simulation of Sloped Sidewall Formation with SPEEDIE," Extended Abstracts of Fall 1990 Meeting of the Electrochemical Society, Seattle, October 1990, Abstract No. 290.
    717. C. L. Chu, K. C. Saraswat and S. S. Wong, "Characterization of Lateral Dopant Diffusion in Silicides," Extended Abstracts, SRC Techcon'90, San Jose, October 1990, pp. 455~458.
    718. S. Wood, K. C. Saraswat and J. M. Harrison "Cost Performance Modeling of Semiconductor Fabs," Extended Abstracts, SRC Techcon'90, San Jose, October 1990, pp. 309~312.
    719. S. Wood, P.P. Apte, T.J. King, M.M. Moslehi, K. C. Saraswat, "Pyrometer Modeling for Rapid Thermal Processing," Proc. SPIE Symp. on Rapid Thermal and Related Processing Techniques, October 1990, Santa Clara, Vol. 1393, pp. 337~348.
    720. Y.J. Lee, C. Chou, B. T. Khuri-Yakub, and K. C. Saraswat, "Noncontacting Acoustic Based Temperature Measurement Technique in Rapid Thermal Processing," Proc. SPIE Symp. on Rapid Thermal and Related Processing Techniques, October 1990, Santa Clara, Vol. 1393, pp. 366~371.
    721. C.J. Pass, M. D. Deal and K. C. Saraswat, "Characterization of Reactively Sputtered WNx and of a W-WN Bilayer Structure," Extended Abstracts of Fall 1990 Meeting of the Electrochemical Society, Seattle, October 1990.
    722. K.S. Uhm, G. Chin, R.W. Dutton, J.P. McVittie and K. C. Saraswat, "Modeling of Submicron Dry Etching Technology Using SUPREM-IV and SPEEDIE," 1990 3rd MicroProcess Conferences, July 16~19, 1990, Chiba, Japan.
    723. K. C. Saraswat, H. C. Wulu, J. C. Rey, M. M. Islamraja, L.-Y. Cheng and J. P. McVittie, "Simulations of LPCVD Profiles," Proc. Workshop on Tungsten and Other Advancec Metals for ULSI Applications VII, Dallas, October 1990, pp. 239~247.
    724. J.C. Rey, L.-Y. Cheng, J. P. McVittie and K. C. Saraswat, "CVD Modeling Using SPEEDIE," 37th Annual AVS Symp., Toronto, November 1990.
    725. T.J. King, J. Pfiester, J. D. Shott, J. P. McVittie and K. C. Saraswat, "A Polycrystalline-Si1-x Ge_x Gated MOS Devices," Technical Digest, IEEE International Electron Device Meeting, December, 1990, San Francisco, pp. 253~256.
    726. J.P. McVittie, J. C. Rey, M. M. Islamraja, L.-Y. Cheng, and K. C. Saraswat, "LPCVD Profile Simulations Using a Re-Emission Model," Technical Digest, IEEE International Electron Device Meeting, December, 1990, San Francisco, pp. 917~920.
    727. C.L. Chu, K. C. Saraswat and S. S. Wong, "Characterization of Lateral Dopant Diffusion in Silicides," Technical Digest, IEEE International Electron Device Meeting, December 1990, San Francisco, pp. 245~248.

      1989
    728. P. Wright and K. C. Saraswat, "The Effect of Fluorine in Silicon Dioxide Gate Dielectric," IEEE Transactions on Electron Devices, Vol. ED-36, May 1989, pp. 879~905.
    729. P. Wright, N. Kasai, S. Inoue and K. C. Saraswat, "Hot Electron Immunity of SiO2 Dielectrics with Fluorine Incorporation," IEEE Electron Devices Letters, Vol. 10, No. 3, August 1989, pp. 347~348.
    730. A. Joshi, H. S. Hu, D. Gardner and K. C. Saraswat, "Fundamental Factors Governing Improved Performance of Al-Si/Ti Multilayer Metallization for VLSI," J. Vacuum Science and Technology, Vol. A 7(3), pp. 1497~1503, May/June 1989.
    731. M. Wong and K. C. Saraswat, "Tungsten and Tungsten Shunted Polysilicon Gate Submicron CMOS Technology," Digest of Technical Papers, Symp. on VLSI Technology, Kyoto, Japan, May 1989.
    732. M. Wong and K. C. Saraswat, "SATPOLY: A Self-Aligned Tungsten on Polysilicon Process for CMOS VLSI Applications," IEEE Transactions on Electron Devices, Vol. 36, No. 7, August 1989, pp. 1355~1361
    733. P. Raje, K. C. Saraswat, and K. Cham, "A New BiCMOS/CMOS Gate Comparison Methodology and Supply Voltage Scaling Model," IEEE International Electron Device Meeting, December, 1989, Washington, D.C.
    734. L.Y. Cheng, J. P. McVittie and K. C. Saraswat, "Modeling and Measurement of CVD SiO2 Step Coverage," Proc. 2nd Int. Symp. ULSI Sci. Technol., The Electrochem. Soc., Los Angeles, Vol. 89-9, pp. 586, May 1989
    735. Y.J. Lee, C. H. Chou, B. T. Khuri-Yakub, K. C. Saraswat and M. M. Moslehi, "Temperature Measurement of Silicon Wafers Using Photo-Acoustic Techniques," Presented at the Sixteenth Review of the Progress in Quantitative NDE, Brunswick, Maine, July 31~August 5, 1989, Published in Review of Progress in Quantitative Nondestructive Evaluation (Plenum Press, New York, 1989)
    736. Y.J. Lee, C. H. Chou, B. T. Khuri-Yakub, K. C. Saraswat and M. M. Moslehi, "Photo-Acoustic Measurements of Silicon Wafers Processing Temperatures," Presented at the 1989 Ultrasonic Symp., Montreal, Canada, 3~5 October 1989.

      1988
    737. D. Gardner and K. C. Saraswat,"Multilayered Interconnections for VLSI," Materials Research Society Symposium, Proc. Vol 103, pp. 343~354, 1988.
    738. D.B. Kao, J.P. McVittie, W.D. Nix, and K. C. Saraswat, "Two-Dimensional Thermal Oxidation of Silicon - I. Expertiments," IEEE Trans. Elec. Dev., Vol. ED-34, May 1987,pp. 1008~1017.
    739. D.B. Kao, J.P. McVittie, W.D. Nix, and K. C. Saraswat, "Two-Dimensional Thermal Oxidation of Silicon - II. Modeling Stress Effects in Wet Oxides," IEEE Trans. Elec. Dev., ED-35, January 1988, pp. 25~37.
    740. P. Wright, W. Loh, and K. Saraswat, "Low-Resistance Submicron Contacts to Silicon," IEEE Trans. Elec. Dev., ED-35, August 1988, pp. 1328~1333.
    741. M. Wong and K. C. Saraswat, "Direct Tungsten on Silicon Dioxide formed by RF Plasma Enhanced Chemical Vapor Deposition," IEEE Electron Device Letters, Vol. EDL-9, No. 11, November 1988, pp. 582~584.
    742. T.A. Schreyer, Y. Nishi, and K. Saraswat, "A Complete RLC Transmission Line Model of Interconnect Delay," IEEE VLSI Technology Symp. Digest, San Diego, May 1988, pp. 95~96.
    743. P. Wright, M. M. Moslehi, and K. C. Saraswat, "Electrical Characteristics and Irradiation Sensitivity of IGFETs with Rapidly Grown Ultrathin Gate Dielectrics," 46th Annual Device Research Conference, The IEEE Electron Devices Society, June 1988, Boulder, Colorado.
    744. K. C. Saraswat, "Single Wafer In-situ Multiprocessing," SRC Techcon'88 Digest of Technical Papers, October 1988 Dallas.
    745. M. Wong and K. C. Saraswat, "Non-Selective RF Plasma Enhanced Chemical Vapor Deposition of Tungsten," Workshop on Tungsten and other Refractory Metals for VLSI Applications, Albuquerque, October 1988.
    746. H.C. Wulu, D. Gardner and K. C. Saraswat, "CVD W Film Stress and Calculation of Stress on p-n Junction Edge Leakage," Proc. Workshop on Tungsten and Other Refractory Metals for VLSI Applications IV, Albuquerque, October 1988, MRS, pp. 111~119.
    747. T.A. Schreyer, Y. Nishi, and K. Saraswat, "Simulation and Measurement of Picosecond Step Responses in VLSI Interconnections," Digest of IEEE International Electron Device Meeting, December, 1988, San Francisco, pp. 344~347.
    748. A. Joshi, H. S. Hu, D. Gardner and K. C. Saraswat, "Fundamental Factors Governing Improved Performance of Al-Si/Ti Multilayer Metallization for VLSI," Proceedings of 35th National Symp. of American Vacuum Society, October 1988.

      1987
    749. W.M. Loh, S. E. Swirhun, T. A. Schreyer, R. M. Swanson, and K. C. Saraswat, "Modeling and Measurement of Contact Resistance," IEEE Trans. Electron Dev., Vol. ED-34, No. 3, pp. 512~524, March 1987.
    750. D. Gardner, J. D. Meindl and K. C. Saraswat, "Interconnection and Electromigration Scaling Theory," IEEE Trans Electron Dev., Vol. ED-34, No. 3, pp. 633~643, March 1987.
    751. T.A. Schreyer, P. Wright, and K. Saraswat, "The Effect of a Superconducting Interconnect on Circuit Performance," extended abstract, 45th Annual Device Research Conference, The IEEE Electron Devices Society, June1987, p. VIB-8.
    752. M. Moslehi, P. Wright, and K. Saraswat, "Submicron IGFET Fabrication by Rapid Thermal Processing," extended abstract, 45th AnnualDevice Research Conference, The IEEE Electron Devices Society, June 1987, p.IIIB-1.
    753. K. C. Saraswat, B. Davies, M. Harrison, S. D. Leeke, W. Lukaszek, J. Mcvittie and J. Shott, "Manufacturing Technology Modeling," Proc. Workshop on Manufacturing Technology at Symp. on VLSI Technology,Karuizawa, Japan, 18 May 1987, pp. 103~125.
    754. P. Wright, W. Loh, C. C. Fu, D. Dameron, and K. C. Saraswat, "Technology and Modeling of Submicron Contacts," Digest of Technical Papers, Symp. on VLSI Technology, Karuizawa, Japan, pp.87~88, May 1987.
    755. P. Wright, W. Loh, C. C. Fu, D. Dameron, and K. C. Saraswat, "Technology and Modeling of Submicron Contacts," Proceedings 4th International IEEE VLSI Multilevel Interconnection Conference, Santa Clara, June 1987, pp. 330~336.
    756. M. Moslehi, M. Wong, K. Saraswat, and S. Shatas, "In-situ MOS Gate Engineering in a Novel Rapid Thermal/Plasma Multiprocessing Reactor," Digest of Technical Papers, Symp. on VLSI Technology, Karuizawa, Japan, pp.21~22, May 1987.
    757. M. Moslehi, S.C. Shatas, K. C. Saraswat and J. D. Meindl, "Interfacial and Breakdown Characterristics of MOS Devices with Rapidly Grown Ultrathin SiO2 Gate Insulators," IEEE Trans Electron Dev., Vol. ED-34, No. 6, pp. 1407~1410, June 1987.
    758. M. Moslehi, and K. C. Saraswat, "Selective and Nonselective LPCVD of Tungsten in a Novel Rapid Thermal/Plasma Reactor," 10th Int. Conf. on CVD, The Electrochem. Soc. Meet., Abs. No. 1053, Honolulu, October 1987.
    759. M. Wong, N. Kobayashi, R. Browning, D. Paine and K. C. Saraswat,"The Effects of Chemical Oxide on the Deposition of Tungsten by the Silicon Reduction of Tungsten Hexaflouride," 10th Int. Conf. on CVD, The Electrochem. Soc. Meet., Abs. No. 1046, Honolulu, October 1987.
    760. S. Leeke, B. Davies and K. Saraswat, "The Virtual Wafer Fab Modeling System," Symp. on Automated IC Manufacturing, The Electrochem. Soc. Meet., Abs. No. 657, Honolulu, October 1987.
    761. S. Leeke and K. Saraswat, "SHIPS: High-level Process Simulation for VLSI Manufacturing," Symp. on Automated IC Manufacturing, The Electrochem. Soc. Meet., Abs. No. 643, Honolulu, October 1987.
    762. M. Wong, N. Kobayashi, R. Browning, D. Paine and K. C. Saraswat,"The Effects of Chemical Oxide on the Deposition of Tungsten by the Silicon Reduction of Tungsten Hexaflouride," J. Electrochem. Soc., Vol. 134, No. 9, September 1987, pp 2339~2345.
    763. M. Moslehi, and K. C. Saraswat, "Formation of MOS Gates by Rapid Thermal/Microwave Remote-Plasma Multiprocessing," IEEE Electron Device Letters, Vol. EDL-8, September, 1987, pp. 421~424.
    764. P. Wright, M. Wong, and K. C. Saraswat, "The Effect of Fluorine on Gate Dielectric Properties," Digest of IEEE Int. Electron Device Meeting, December 1987, Washington, D.C., pp. 574~577.
    765. T.A. Schreyer, A. Bariya, J. P. McVittie and K. Saraswat, "Specific Contact Resistivity of RIE Etched Contacts," J. Vac. Sci. Tech., Vol. A6(3), May/June 1988, pp. 1402~1406. Also Presented at the Nov. 1987 meet of American Vac. Soc., Anehiem, CA.

      1986
    766. M. Moslehi, S.C. Shatas and K. C. Saraswat, "Rapid Thermal Oxidation of Silicon," Fifth International Symposium on Silicon Materials Science and Technology, ECS Proc., vol. 86--4, pp. 379~397, May, 1986, Boston.
    767. M. Moslehi and K. C. Saraswat, "Rapid Thermal Nitridation of SiO2 for Nitroxide Thin Dielectrics," IEEE Silicon Interface Specialties Conference (IEEE-SISC), December, 1985, Florida.
    768. W.M. Loh, P.J. Wright, T.A. Schreyer, S.E. Swirhun. K. C. Saraswat and J.C. Meindl, "The Sidewall Resistor - A Novel Test Structure to Reliably Extract Specific Contact Resistivity," IEEE Trans. Electron Devices, Vol. EDL-7, No. 8, August, 1986, pp. 447~449.
    769. T.A. Schreyer, S. Swirhun, W. Loh, K. Saraswat and R. Swanson, "Comparison of Test Structures used for the Measurement of Low Resistive Metal-Semiconductor Contacts," IEEE VLSI Workshop on Test Structures, February, 1986, pp. 7~23, Long Beach, CA.
    770. T.A. Schreyer and K. C. Saraswat, "A Two-Dimensional Analytical Model for the Cross-Bridge Kelvin Resistor," IEEE Electron Devices, Vol. EDL-7, No. 11, December, 1986. pp. 661~663.
    771. K. C. Saraswat, W. Loh, T. Schreyer and S. Swirhun, "Measurement and Extraction of Specific Contact Resistivity," Proceedings 3rd International IEEE VLSI Multilevel Interconnection Conference, IEEE, Santa Clara, June 1986, pp. 385~395.
    772. F.C. Shone, S. E. Hansen, D. B. Kao K. C. Saraswat and J. D. Plummer, "Modeling Dopant Redistribution in SiO2/WSi2/Si Structure," Digest of IEEE Int. Electron Device Meeting, December, 1986, pp. 534~537, Washington, D.C.
    773. M. Moslehi, S. C. Shatas, and K. C. Saraswat, "Rapid thermal oxidation and nitridation of silicon," The Fifth Intl. Symp. on Silicon Materials Sci. and Technol., ECS Proc. vol. 86-4, pp.~379~397, May 1986.

      1985
    774. D. Gardner, T.L. Michalka, K. C. Saraswat, T.W. Barbee Jr., J.P. McVittie and J. D. Meindl, "Layered and Homogeneous Films of Al and Al/Si with Ti and W for Multilayer Interconnects," IEEE Transaction Electron Devices, Vol. ED-32, February, 1985, pp. 174~183.
    775. S. Swirhun, E. Sangiorgi, R.M. Swanson, K. C. Saraswat and R.W. Dutton, "A VLSI Suitable Schottky Barrier CMOS Process," IEEE Trans. Electron Dev., Vol. ED-32, No. 2, Feb. 1985, pp. 194~202.
    776. M. Moshlehi and K. C. Saraswat, "Thermal Nitridation of Si and SiO2 for VLSI," IEEE Trans. Electron Dev., Vol. ED-32, February, 1985, pp. 106~123.
    777. D.B. Kao, K. C. Saraswat and J.P. McVittie, "Annealing of Oxide Fixed Charges in Scaled Polysilicon Gate MOS Structures," IEEE Trans. Electron Dev., Vol. ED-32, May, 1985, pp. 918~925.
    778. H. Singh, K. C. Saraswat, J. D. Shott, J.P. McVittie and J. D. Meindl, "Hydrogenation by Ion Implantation," IEEE Electron Dev. Lett., Vol. EDL-6, No. 3, March 1985, pp. 139~141.
    779. K. Shenai, E. Sangiorgi, R.M. Swanson, K. C. Saraswat and R.W. Dutton, "Modeling and Characterization of Dopant Redistribution in Metal and Silicide Contacts," IEEE Transaction Electron Devices, 1985, ED-32, 793~799, April 1985.
    780. J. Han, M. Moslehi, C.R. Helms and K. Saraswat, "Time Dependent Compositional Variation in SiO2 films Nitrided in Ammonia," Applied Physics Letters, Vol. 46, April 1985, pp. 641~643.
    781. M. Moslehi, C.J. Han, K. C. Saraswat, C.R. Helms and S. Shatas, "Compositional Studies of Thermally Nitrided Silicon Dioxide (Nitroxide)," Journal Electrochemical Society, Vol. 132, September, 1985, pp. 2189~2197.
    782. M. Moslehi, C.Y. Fu, T.W. Sigmon and K. C. Saraswat, "Low-Temperature Direct Nitridation of Silicon in Nitrogen Plasma Generated by Microwave Discharge," Journal of Applied Physics, Vol. 58, No. 6, 15 September , 1985, pp. 2416~2419.
    783. M. Moslehi, K. C. Saraswat and S.C. Shatas, "Rapid Thermal Nitridation of SiO2 for Nitroxide Thin Dielectrics," Applied Physics Letters, Vol. 47, No. 10, 15 November, 1985, pp. 1113~1115.
    784. M. Moslehi, C.Y. Fu, K. C. Saraswat and R. Bruce, "Low Temperature Direct Nitridation of Silicon in Nitrogen Plasma Generated by Microwave Discharge," Proc. International Symposium on VLSI, May 1985, pp. 286~290, Taipei.
    785. M. Moslehi, C.Y. Fu and K. C. Saraswat, "Thermal and Microwave Nitrogen Plasma Nitridation Techniques for Ultrathin Gate Insulators of MOS VLSI," Digest of 1985 Symposium on VLSI Technology, May, 1985, pp. 14~15, Kobe, Japan.
    786. M. Moslehi, S.C. Shatas and K. C. Saraswat, "Thin SiO2 Insulators Grown by Rapid Thermal Oxidation of Silicon," Applied Physics Letters, Vol. 47, No. 12, December 15, 1985.
    787. W.M. Loh, K. C. Saraswat and R.W. Dutton, "Analysis and Scalings for Extraction of Specific Contact Resistivity," IEEE Electron Device Letters, Vol. EDL-6, March, 1985, pp. 105~108.
    788. W.M. Loh, S.E. Swirhun, E. Crabbe, K. Saraswat and R. M. Swanson, "An Accurate Method to Extract Specific Contact Resistivity Using Cross-Bridge Kelvin Resistors," IEEE Electron Device Letters, Vol. EDL-6, September, 1985, pp. 441~444.
    789. S. Swirhun, W.M. Loh, R.M. Swanson and K. C. Saraswat, "Current Crowding Effects and Determination of Specific Contact Resistivity from Contact End Resistance Measurements," IEEE Electron Device Letters, Vol. EDL-6, December, 1985, pp. 639~641.
    790. D. Gardner, T.L. Michalka, P.A. Flinn, K. C. Saraswat and J. D. Meindl, "Homogeneous and Layered Films of Al/Si with Ti for Multilevel Interconnections," Proceedings 2nd International IEEE VLSI Multilevel Interconnection Conference, Santa Clara, June 1985, pp. 102~113.
    791. M. Deal, D. Pramanik, A.N. Saxena and K. C. Saraswat, "Application of Tungsten Silicide/N+ Polysilicon Technology for VLSI," Proceedings 2nd International IEEE VLSI Multilevel Interconnection Conference, Santa Clara, June 1985, pp. 326~334.
    792. D.B. Kao, K. C. Saraswat, J.P. McVittie and W.D. Nix, "The Role of Stress in Two-Dimensional Si Oxidation," 43rd IEEE Device Research Conference, Boulder, June 1985.
    793. D.B. Kao, J.P. McVittie, W.D. Nix and K. C. Saraswat, "Two-Dimensional Silicon Oxidation Experiments and Theory," Digest of IEEE Electron Device Meeting, December, 1985, pp. 388~391, Washington, D.C.
    794. W.M. Loh, S.E. Swirhun, T.A. Schreyer, R.M. Swanson and K. C. Saraswat, "2-D Simulations for Accurate Extraction of the Specific Contact Resistivity from Contact Resistance Data," Digest of IEEE International Electron Device Meeting, December, 1985, pp. 586~589, Washington, D.C.
    795. F. Shone, K. C. Saraswat and J. D. Plummer, "Formation of 0.1 1 mm N+/P and P+/N Junctions by Doped Silicide Technology," Digest of IEEE Int. Electron Device Meeting, December, 1985, pp. 407~410, Washington, D.C.
    796. M. Moslehi, C.Y. Fu, K. C. Saraswat and R. Bruce, "Low Temperature Nitridation of Silicon in Microwave Nitrogen Plasma," The 167th Meeting of the Electrochemical Society, May, 1985, Ontario, Canada.
    797. M. Moslehi, K. C.Saraswat and S.Shatas, "Rapid Thermal Nitridation of Si and SiO2 in Ammonia," Presented in the Electronic Materials Conference, June, 1985, Colorado.
    798. C.Y. Fu, M.M. Moslehi and K. C. Saraswat, "Material Studies of Silicon Nitride Films Grown in Microwave Nitrogen Plasma," Presented in the Electronic Materials Conference, June, 1985, Colorado.

      1984
    799. D.L. Brors, J.A. Fair, K.A. Monig and K. C. Saraswat, "Deposition Parameters and Characteristics of Low Pressure CVD Tungsten Silicide," Proceedings 9th International Conference on CVD in the 165th Meet of Electrochemical Society, Cincinnati, May 1984., pp. 275~286.
    800. S. Swirhun, K. C. Saraswat and R.M. Swanson, "Contact Resistance of LPCVD W/Al and PtSi/W/Al Metallization," IEEE Transaction Electron Device Letters, Vol. EDL-5, June, 1984., pp. 209~211.
    801. L.N. Lie, W.A. Tiller and K. C. Saraswat, "Thermal Oxidation of Silicides," Journal of Applied Physics, Vol. 56 (7), October, 1984., pp. 2127~2132.
    802. K. Shenai, E. Sangiorgi, K. C. Saraswat, R.M. Swanson and R.W. Dutton, "Accurate Barrier Modeling of Metal and Silicide Contacts," IEEE Electron Device Letters, Vol. EDL-5, May, 1984., pp. 145~147.
    803. D.L. Brors, K.A. Monig, J.A. Fair, W. Coney and K. C. Saraswat, "CVD Tungsten - A Solution for the Poor Step Coverage and High Contact Resistance of Al," Solid State Technology, Vol. 27, April, 1984., pp. 313.
    804. D. Gardner, T. Michalka, K. Saraswat, J. McVittie, T. Barbee Jr., and J. Meindl, "Al Alloys with Ti, W and Cu for Multilayer Interconnections," Proceedings 1st IEEE VLSI Multilevel Interconnection Conference, New Orleans, June 1984., pp. 68~77.
    805. D. Gardner, T. Michalka, T. Barbee Jr., K. Saraswat, J. McVittie and J. Meindl, "Aluminum Alloys with Titanium, Tungsten and Copper for Multilayer Interconnections," 42nd IEEE Device Research Conference, Santa Barbara, June 1984.
    806. H. Singh, K. C. Saraswat and J. D. Meindl, "Hydrogenation by Ion Implantation for VLSI/SOI Applications," 42nd IEEE Device Research Conference, Santa Barbara, June 1984.
    807. S. Swirhun, E. Sangiorgi, A. Weeks, M. Pinto C. Rafferty, K. Saraswat, R. Dutton and R. Swanson, "High Performance Latchup Free CMOS," Presented at the 42nd IEEE Device Research Conference, Santa Barbara, June 1984.
    808. K.A. Monig, D.L. Brors, J.A. Fair, W. Coney and K. C. Saraswat, "Properties and Deposition of Low Pressure CVD Tungsten Silicide Films," 42nd IEEE Device Research Conference , Santa Barbara, June 1984.
    809. M. Moslehi and K. C. Saraswat, "Studies of Trapping and Conduction in Ultrathin SiO2 Gate Insulators," Proceedings IEEE International Electron Device Meeting, December 1984, pp. 157~160, San Francisco.
    810. M. Moslehi and K. C. Saraswat, "Ultrathin Thermal Silicon Nitride and Nitroxide Insulators for VLSI," Proc. IEEE International Electron Device Meeting, December 1984, pp. 165~168, San Francisco.

      1983
    811. M. Moslehi and K. C. Saraswat, "Thermal Nitridation of Silicon in a Cold Wall Reactor," 163rd Meeting of Electrochemical Society, San Francisco, Proc. Symp. on Silicon Nitride Thin Insulating Films, vol. 83-8, pp. 324~345, May 1983.
    812. D.L. Brors, J.A. Fair, K.A. Monig and K. C. Saraswat, "Properties of Low Pressure CVD Tungsten Silicide as Related to IC Process Requirements," Solid State Technology, Vol. 26, April, 1983., pp. 183~186.
    813. M. Moslehi and K. C. Saraswat, "Electrical Characteristics of Devices Fabricated with Ultrathin Thermally-Grown Silicon Nitride and Nitroxide Gate Insulators," 1983 Symposium on VLSI Technology, Maui, Hawaii, September 1983, Abstract No. 7-4.
    814. K. C. Saraswat, D.L. Brors, J.A. Fair, K.A. Monig and R. Beyers, "Properties of Low Pressure CVD Tungsten Silicide for MOS VLSI Interconnections," IEEE Transaction Electron Dev., Vol. ED-30, November, 1983., pp. 1497~1505.
    815. H. Singh, K. C. Saraswat, J. D. Shott, J.P. McVittie and J. D. Meindl, "Scaling of SOI/PMOS Transistors," Technical Digest of IEEE International Electron Device Meeting, Washington D.C. , December 1983., pp. 67~69.
    816. K. C. Saraswat, S.Swirhun and J.P. McVittie, "Selective CVD of Tungsten for VLSI Technology," VLSI Science and Technology , Electrochemical Society, 1984., pp. 409~419.
    817. D.B. Kao, K. C. Saraswat and J.P. McVittie, "Annealing of Oxide Fixed Changes in Scaled Polysilicon Gate MOS Structures," Proceedings of the 14th Semiconductor Interface Specialists Conference, Miami Beach, December 1983.

      1982
    818. K. C. Saraswat and H. Singh, "Thermal Oxidation of Phosphorus Doped Polycrystalline Silicon," Journal Electrochemical Society, Vol. 129, October, 1982., pp. 2321~2326.
    819. K. C. Saraswat and F. Mohammadi, "Effect of Interconnection Scaling on Time Delay of VLSI Circuits," IEEE Transaction Electron Devices, Vol. ED-29, April, 1982., pp. 645~650.
    820. B. Swaminathan, K. C. Saraswat, R.W. Dutton and T.I. Kamins, "Diffusion of Arsenic in Polycrystalline Silicon," Applied Physics Letters, Vol. 40(9), May l, 1982., pp. 745~748.
    821. K. C. Saraswat, R.S. Nowicki and J.F. Moulder, "Thermal Oxidation of Tantalum Silicide in O2 and H2O," Applied Physics Letters, Vol. 41, No. 12, December, 1982., pp. 1127~1129.

      1981
    822. F. Mohammadi and K. C. Saraswat, "N-Channel MOSFETs with WSi2 Gate," IEEE Electron Device Letters, Vol. EDL-2, 1981.
    823. H. Singh and K. C. Saraswat, "Thermal Oxidation of Heavily Doped Polycrystalline Silicon Thin Films," Extended Abstracts of the Spring Meeting of Electrochemical Society, Minneapolis, May 1981, Volume 81-1.
    824. K. C. Saraswat, R.S. Nowicki and J.F. Moulder, "Thermal Oxidation of Tantalum Silicide Deposited by Cosputtering," 23rd Electronics Materials Conference, Santa Barbara, CA, June 24~26 1981.
    825. M. M. Mandurah, K. C. Saraswat and T.I. Kamins, "A Model for Conduction in Polycrystalline Silicon: I. Theory," IEEE Transaction Electron Devices, Vol. ED-28, October, 1981., pp. 1163~1171.
    826. M. M. Mandurah, K. C. Saraswat and T.I. Kamins, "A Model for Conduction in Polycrystalline Silicon: II. Comparison of Theory and Experiment," IEEE Transaction Electron Devices, Vol. ED-28, October, 1981., pp. 1171~1176.
    827. C.M. Liu, M. Khambaty and K. C. Saraswat, "The Process Dependence of the Electrical Resistivity of LPCVD Polycrystalline Silicon Films," 23rd Electronics Materials Conference, Santa Barbara, June 24~26 1981.

      1980
    828. F. Mohammadi, K. C. Saraswat and J. D. Meindl, "A High Voltage MOSFET in Polycrystalline Silicon," IEEE Transactions Electron Devices, Vol. ED-27, January, 1980., pp. 293--295.
    829. T. I. Kamins, K.F. Lee, J.F. Gibbons and K. C. Saraswat, "A Monolithic Integrated Circuit Fabricated in Laser-Annealed Polysilicon," IEEE Transaction Electron Devices, Vol. ED-27, January, 1980., pp. 290~293.
    830. F. Mohammadi and K. C. Saraswat, "Properties of Sputtered Tungsten Silicide for MOS Integrated Circuit Application," Journal Electrochem Society, Vol. 127, No. 2, February, 1980., pp. 450~454.
    831. K. C. Saraswat and F. Mohammadi, "Work Function of WSi2," IEEE Electron Device Letters, Vol. EDL-1, February, 1980., pp. 18~19.
    832. M. M. Mandurah, K. C. K.C. Saraswat and T.I. Kamins, "Arsenic Segregation in Polycrystalline Silicon," Applied Physics Letters, Vol. 36(8), April, 1980., pp. 683~685.
    833. F. Mohammadi, K. C. K.C. Saraswat and J. D. Meindl, "Thermal Oxidation of Sputtered thin Films of WSi2," Proceedings of the Symposium on Thin Film Interfaces and Interactions, Electrochemical Society, 1980., pp. 506~513.
    834. K. C. Saraswat and F. Mohammadi, "Formation of WSi2 of Tungsten on Silicon," Extended Abstracts of the 157th Meeting of Electrochemical Society, St. Louis, May 1980., pp. 419~421.
    835. F. Mohammadi, T.W. Sigmon and K. C. Saraswat, "Effect of Temperature and Substrate on the Steam Oxidation Mechanism of Thin WSi2 Films," Extended Abstracts of 157th Meeting of Electrochemical Society, St Loius, May 1980., pp. 422~424.
    836. T. Shibata, T.W. Sigmon, J.F. Gibbons, F. Mohammadi and K. C. Saraswat, "Oxidation Studies of WSi2 and PdSi Formed by Scanned Laser Beam Reaction," 38th IEEE Device Research Conference, Ithaca, Cornell University, June 1980.
    837. J. Rouse, F. Mohammadi, C.R. Helms and K. C. Saraswat, "Studies of Steam-Oxidized WSi2 by Auger Sputter Profiling," Applied Physics Letters, Vol. 37, 1980., pp. 305~307.
    838. M. M. Mandurah, K. C. Saraswat, C.R. Helms and T.I. Kamins, "Dopant Segregation in Polycrystalline Silicon Films," Journal of Applied Physics, Vol. 51, 1980., pp. 5755~5767.
    839. K. C. Saraswat, F. Mohammadi and J. Beaudouin, "WSi2 Gate MOS Technology," 8th International Vacuum Congress, Cannes, France, September 22~26, 1980.
    840. M. M. Mandurah, K. C. Saraswat, C.R. Helms and T.I. Kamins, "Effect of Annealing on the Electrical Properties of Polycrystalline Silicon," Extended Abstracts of 158th Meeting of Electrochemical Society, Florida, October 1980, Volume 8-2.

      1979
    841. R. Reif, T.I. Kamins and K. C. Saraswat, "A Model for Dopant Incorporation into Growing Si Epitaxial Films: I Theory," Journal of Electrochem Society, Vol. 126, No. 4, April, 1979., pp. 644~652.
    842. R. Reif, T.I. Kamins and K. C. Saraswat, "A Model for Dopand Incorporation into Growing Si Epitaxial Films: II. Comparison of Theory and Experiment," Journal Electrochemical Society, Vol. 125, No. 4, April, 1979., pp. 653~660.
    843. K. C. Saraswat, F. Mohammadi and J. D. Meindl, "Effect of Annealing on the Properties of Thin Films of WSi2," Extended Abstracts of the Spring 1979 Meeting of the Electrochemical Society, Boston, May 1979, Abstract No. 144, Volume 79-1.
    844. F. Mohammadi, K. C. Saraswat, J. Beaudouin and J. D. Meindl, "Silicide Formation by Laser Heating of Sputtered Refractory Metal Films on Silicon," Extended Abstracts of the Spring 1979 Meeting of the Electrochemical Society, Boston, May 1979, Abstract No. 146, Volume 79-1.
    845. M. M. Mandurah, K. C. Saraswat and T.I. Kamins, "Phosphorus Doping of Low Pressure Chemically-Vapor-Deposited Silicon Films," Journal of Electrochemical Society, Vol. 126, No. 5, June, 1979., pp. 1019~1023.
    846. F. Mohammadi, K. C. Saraswat and J. D. Meindl, "Kinetics of the Thermal Oxidation of Sputtered WSi2," Applied Physics Letters, Vol. 35, October, 1979., pp. 529--531.
    847. F. Mohammadi, K. C. Saraswat and J. D. Meindl, "Thermal Oxidation of Sputtered Thin Films of WSi2," Extended Abstracts of the Fall 1979 Meeting of the Electrochemical Society, Los Angeles, October 1979, Abstract No. 393, Volume 79-2.
    848. M. M. Mandurah, K. C. Saraswat and T.I. Kamins, "Dopant Segregation in Polycrystalline Silicon," Extended Abstracts of the Fall 1979 Meeting of the Electrochem Society, Los Angeles, October 1979, Abstract No. 571, Volume 79-2.
    849. R. Reif, M. Vanzi, R.W. Dutton, T.I. Kamins and K. C. Saraswat, "Initial Transients in the Silicon Deposition Process," Extended Abstracts of the Fall 1979 Meeting of the Electrochemical Society, Los Angeles, October 1979, Abstract No. 563, Volume 79-2.
    850. K.F. Lee, J.F. Gibbons, K. C. Saraswat and T.I. Kamins, "Thin Film MOSFET Fabricated in Laser-Annealed Polycrystalline Silicon," Journal Applied Physics Letters, Vol. 35, July, 1979., pp. 173~175.
    851. K. C. Saraswat, F. Mohammadi and J. D. Meindl, "WSi2 Gate MOS Devices," Technical Digest of the International Electron Device Meeting, Washington, D.C., December 1979.
    852. F. Mohammadi, J. Rouse, K. C. Saraswat and R. Helms, "Physical Properties of Steam Oxidized WSi2," IEEE Semiconductor Interface Specialist Conference, New Orleans, November 1979.

      1978
    853. K. C. Saraswat and J. D. Meindl, "Breakdown Walkout in Planar p-n Junctions," Solid State Electronics, Vol. 21, June, 1978., pp. 813~819.
    854. R. Reif, T.I. Kamins and K. C. Saraswat, "A Model for Dopant Incorporation into Silicon Epitaxial Films," Extended Abstracts of the Spring 1978 Meeting of the Electrochemical Society, Seattle, May 1978, Abstract No. 208, Volume 78-1.
    855. R. Reif, T.I. Kamins and K. C. Saraswat, "Model for Dopant Incorporation into Silicon Epitaxial Films," 1978 Device Research Conference, Santa Barbara, CA, June 1978.
    856. T. I. Kamins, M.M. Mandurah and K. C. Saraswat, "Structure and Stability of Low-Pressure Chemically-Vapor-Deposited Silicon Films," Journal of Electrochemical Society, Vol. 125, No. 6, June, 1978., pp. 927~932.
    857. M. M. Mandurah,. K. C. Saraswat and T.I. Kamins, "Doping of Low-Pressure Chemically-Vapor-Deposited Silicon Films," Fall 1978 Meeting of the Electrochemical Society, Pittsburgh, PA, October 1978.
    858. R. Reif, T.I. Kamins and K. C. Saraswat, "Transient and Steady-State Response of the Dopand System of a Silicon Epitaxial Reactor: Transfer Function Approach," Journal of Electrochemical Society, Vol. 125, No. 11, November, 1978., pp. 1860~1866.

      1977
    859. K. C. Saraswat and J. D. Meindl, "Low Temperature Diffusion of Boron from Diborane Using Carbon Dioxide as Oxidant," J. Electrochemical Society, Vol. 124, No. 3, March, 1977., pp. 471~472.
    860. K. C. Saraswat and J. D. Meindl, "Epitaxial Silicon Growth on Ion Implanted Silicon," Extended Abstracts of the Spring 1977 Meeting of the Electrochemical Society, Philadelphia, PA, 1977, Abstract No. 116. Volume 77-1.
    861. R. Reif, T.I. Kamins and K. C. Saraswat, "Transient and Steady-State Response of the Dopant System of an Epitaxial Reactor: Growth Rate Response," Extended Abstracts of the Fall 1977 Meeting of the Electrochemical Society, Atlanta, October 1977, Abstract No. 350, Volume 77-2.
    862. J. D. Meindl, R.W. Dutton, K. C. Saraswat, J. D. Plummer, T.I. Kamins and B.E. Deal, Silicon Epitaxy and Oxidation, Noordhoff-Leyden, 1977, pp. 57~113, Edited by F. Van de Wiele, W.L. Engl and P.G. Jaspers.

      1976
    863. K. C. Saraswat and J. D. Meindl, "A New Bipolar Process - Borsenic," IEEE Journal of Solid State Circuits, Vol. SC-11, August, 1976., pp. 495~499.
    864. T. I. Kamins, R. Reif and K. C. Saraswat, "Transient Response of Dopant Incorporation into Silicon Epitaxial Films," Extended Abstracts of Fall 1976 Meeting of the Electrochemical Society, Las Vegas, Nevada, October 1976, Abstract No. 230.

      1975
    865. K. C. Saraswat, J. D. Meindl and J. Berger, "A High Voltage MOS Switch," IEEE Journal of Solid-State Circuits, Vol. SC-10, June, 1975., pp. 136~142.
    866. K. C. Saraswat and J. D. Meindl, "Borsenic Bipolar Process," Technical Digest of the International Electron Device Meeting, Washington D.C., December 1975., pp. 437~439.

      1974
    867. K. C. Saraswat and J. D. Meindl, "H.V. Silicon-Gate MOS Integrated Circuits for Driving Piezoelectric Tactile Displays," ISSCC Digest of Technical Papers, ISSCC, 1974., pp. 164~165.